mesa/src/amd
Samuel Pitoiset bb82a3402a radv: track the pipeline bind point for indirect commands layout
This will be used to implement DGC compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
2023-08-23 06:05:39 +00:00
..
addrlib ac/radv: decouple radv vulkan driver and compiler from gallium 2023-08-03 09:45:42 +00:00
ci ci: disable Material Testers.x86_64_2020.04.08_13.38_frame799.rdc trace 2023-08-21 22:31:21 +00:00
common ac/sqtt,radv/sqtt: Add and use marker for separate RT compilation 2023-08-22 11:33:11 +00:00
compiler aco: Do not fixup registers if there are no shader calls 2023-08-22 15:46:29 +00:00
drm-shim amd/drm-shim: use fixed-width types 2023-06-23 18:35:52 +00:00
llvm ac: implement AMD_FORCE_FAMILY properly, remove SI_FORCE_FAMILY 2023-08-19 19:36:55 +00:00
registers ac: change offsets of DMA_DATA dwords to prevent reg offset conflicts 2023-08-19 19:36:55 +00:00
vulkan radv: track the pipeline bind point for indirect commands layout 2023-08-23 06:05:39 +00:00
meson.build meson: build radeonsi with aco 2023-05-15 02:01:10 +00:00