Sagar Ghuge 845ab3d627 anv: Handle bits to flush data-port's Untyped L1 data cache ... v2: Drop ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT from invalidate bits (Lionel) Add utrace support Expand on comment about PIPE_CONTROL::UntypedDataPortCache Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>		2022-08-05 10:43:50 +03:00
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blorp	intel/blorp: Set uses_sample_shading for MSAA blit shaders	2022-07-13 20:28:42 +00:00
ci	gallivm/nir/st: lower image derefs in advance.	2022-08-05 06:18:44 +00:00
common	intel: protect against empty invalidate ranges	2022-07-13 01:33:27 +00:00
compiler	intel/compiler: use NIR_PASS more	2022-08-02 10:07:05 +00:00
dev	intel/dev: remove INTEL_DEVID_OVERRIDE	2022-08-02 11:17:58 +00:00
ds	intel/ds: track untyped dataport flushes	2022-08-05 10:43:50 +03:00
genxml	intel: fix typos found by codespell	2022-06-27 10:20:55 +00:00
isl	intel/isl: Setting L1 caching policy to Write-back mode	2022-08-05 10:43:50 +03:00
nullhw-layer	intel/nullhw: Use correct macro to fix build regression	2022-08-01 10:54:38 +00:00
perf	intel: fix typos found by codespell	2022-06-27 10:20:55 +00:00
tools	intel/tools/stub: fixup parsing of --platform=	2022-08-02 11:17:58 +00:00
vulkan	anv: Handle bits to flush data-port's Untyped L1 data cache	2022-08-05 10:43:50 +03:00
meson.build	anv: add perfetto source	2022-01-14 20:17:44 +00:00