Samuel Pitoiset b366fef091 radv: optimize the number of loaded components for VS inputs in NIR ... fossils-db (Sienna Cichlid): Totals from 3691 (2.74% of 134913) affected shaders: VGPRs: 121368 -> 121584 (+0.18%); split: -0.36%, +0.54% CodeSize: 7597912 -> 7561140 (-0.48%); split: -0.66%, +0.18% MaxWaves: 104706 -> 104772 (+0.06%) Instrs: 1441229 -> 1437652 (-0.25%); split: -0.53%, +0.28% Latency: 5500766 -> 5482101 (-0.34%); split: -0.45%, +0.11% InvThroughput: 804401 -> 797178 (-0.90%); split: -1.09%, +0.20% VClause: 25185 -> 25143 (-0.17%); split: -0.50%, +0.33% SClause: 27486 -> 27445 (-0.15%); split: -0.57%, +0.42% Copies: 143816 -> 147900 (+2.84%); split: -0.54%, +3.38% PreSGPRs: 109584 -> 110396 (+0.74%); split: -0.04%, +0.79% PreVGPRs: 95541 -> 94583 (-1.00%); split: -1.12%, +0.12% fossils-db (Polaris10): Totals from 1773 (1.30% of 135960) affected shaders: SGPRs: 80848 -> 80864 (+0.02%); split: -0.14%, +0.16% VGPRs: 56424 -> 55600 (-1.46%); split: -1.47%, +0.01% CodeSize: 1732588 -> 1696840 (-2.06%); split: -2.07%, +0.01% MaxWaves: 12103 -> 12106 (+0.02%) Instrs: 347684 -> 341597 (-1.75%); split: -1.76%, +0.01% Latency: 2542840 -> 2523946 (-0.74%); split: -0.95%, +0.21% InvThroughput: 924601 -> 905102 (-2.11%); split: -2.13%, +0.02% VClause: 9565 -> 9545 (-0.21%); split: -0.51%, +0.30% SClause: 10587 -> 10333 (-2.40%); split: -2.82%, +0.43% Copies: 19321 -> 20307 (+5.10%); split: -0.78%, +5.88% PreSGPRs: 30879 -> 30875 (-0.01%); split: -0.20%, +0.18% PreVGPRs: 41211 -> 41270 (+0.14%); split: -0.73%, +0.87% Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15317>		2022-03-11 07:40:10 +00:00
..
addrlib	amd: update addrlib	2022-03-01 17:03:00 +00:00
ci	radv/ci: remove unused files	2022-03-08 08:25:34 +01:00
common	ac: Query the amdgpu MEC firmware version.	2022-03-09 21:31:48 +00:00
compiler	aco: always emit vk_cvt_pkrtz_f16_f32 for nir_op_pack_half_2x16_split	2022-03-09 16:24:20 +00:00
drm-shim	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00
llvm	ac/nir: implement nir_op_pack_{uint,sint}_2x16	2022-03-04 08:06:56 +00:00
registers	amd: remove the _UMD suffix from register definitions	2022-02-22 11:41:04 +00:00
vulkan	radv: optimize the number of loaded components for VS inputs in NIR	2022-03-11 07:40:10 +00:00
.clang-format	radv, aco: Add u_foreach_bit to .clang-format.	2022-02-22 14:57:29 +00:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00