mesa/src
Topi Pohjolainen a5e1c9f1d5 i965/gen4: Add support for single layer in alignment workaround
On gen < 6 one doesn't have level or layer specifiers available
for render and depth targets. In order to support rendering to
specific level/layer, driver needs to manually offset the surface
to the desired slice.
There are, however, alignment restrictions to respect as well and
in come cases the only option is to use temporary single slice
surface which driver copies after rendering to the full miptree.

Current alignment workaround introduces new texture images which
are added to the parent texture object. Texture validation later
on copies the additional levels back to the surface that contains
the full mipmap.
This only works for non-arrayed surfaces and driver currently
creates new arrayed images in vain - individual layers within the
newly created are still unaligned the same as before.

This patch drops this mechanism and instead attaches single
temporary slice into the render buffer. This gets immediately
copied back to the mipmapped and/or arrayed surface just after
the render is done.

Sitting on top of earlier series cleaning up the depth buffer
state, this patch additionally fixes the following piglit tests:

    arb_framebuffer_object.fbo-generatemipmap-cubemap.g965m64
    arb_texture_cube_map.copyteximage cube.g965m64
    arb_texture_cube_map.copyteximage cube.ilkm64
    arb_pixel_buffer_object.texsubimage array pbo.g965m64
    ext_framebuffer_object.fbo-cubemap.g965m64
    ext_texture_array.copyteximage 1d_array.g45m64
    ext_texture_array.copyteximage 1d_array.g965m64
    ext_texture_array.copyteximage 1d_array.ilkm64
    ext_texture_array.copyteximage 2d_array.g45m64
    ext_texture_array.copyteximage 2d_array.g965m64
    ext_texture_array.copyteximage 2d_array.ilkm64
    ext_texture_array.fbo-array.g965m64
    ext_texture_array.fbo-generatemipmap-array.g965m64
    ext_texture_array.gen-mipmap.g965m64

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:18:53 +03:00
..
amd radeonsi/gfx9: fix TC-compatible stencil compression 2017-06-19 20:15:36 +02:00
compiler glsl: gl_Max{Vertex,Fragment}UniformComponents exist in all desktop GL versions 2017-06-19 14:43:54 +02:00
egl egl/display: make platform detection thread-safe 2017-06-16 11:02:06 +01:00
gallium radeonsi: fix dumping shader descriptors into ddebug logs 2017-06-19 20:16:20 +02:00
gbm gbm: implement FD import with modifier 2017-06-15 10:43:36 +01:00
getopt
glx dri: Optionally turn off a couple of GLX extensions based on driconf options 2017-06-07 19:43:54 +02:00
gtest gtest: Update to 1.8.0. 2017-01-20 11:40:52 -08:00
hgl glapi/hgl: remove the final user of _glapi_check_table() 2016-10-06 15:03:46 +01:00
intel anv: Fix L3 cache programming on Bay Trail 2017-06-19 12:05:52 -07:00
loader loader: build libloader_dri3_helper.la only with HAVE_PLATFORM_X11 2017-05-19 19:44:22 +01:00
mapi mesa: add KHR_no_error support for glGetImageHandleARB() 2017-06-18 14:21:04 +02:00
mesa i965/gen4: Add support for single layer in alignment workaround 2017-06-19 22:18:53 +03:00
util mesa/util: add util_dynarray_clear() helper 2017-06-18 14:10:32 +02:00
vulkan Android: vulkan: fix build error due to extra ) 2017-06-08 07:26:04 -05:00
Makefile.am automake: increase the MESA_GIT_SHA1 hash id length from 7 to 10 digits 2017-06-15 13:53:00 -06:00
SConscript