Samuel Pitoiset a19fd0f634 radv: replace pipeline->force_vrs_per_vertex during cmdbuf recording ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22128>		2023-03-29 10:18:24 +00:00
..
addrlib	amd: split GFX1103 into GFX1103_R1 and GFX1103_R2	2023-02-03 00:18:01 +00:00
ci	radv/ci: update CI lists for Polaris10 and Pitcairn	2023-03-28 22:56:15 +00:00
common	ac/nir: add ac_nir_lower_ps	2023-03-28 19:57:11 +00:00
compiler	aco: clean up to_mad_mix	2023-03-28 23:30:08 +00:00
drm-shim	r300: use drm_shim_override	2022-11-16 14:37:47 +00:00
llvm	ac/llvm: implement float16 nir_op_pack_(s|u)norm_2x16	2023-03-28 19:57:11 +00:00
registers	amd/registers: only define SPI and COMPUTE registers in the 0xB000 range	2023-02-24 21:27:24 +00:00
vulkan	radv: replace pipeline->force_vrs_per_vertex during cmdbuf recording	2023-03-29 10:18:24 +00:00
.clang-format	amd: Add radv_foreach_stage to ForEachMacros.	2023-03-27 08:29:35 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00