Alyssa Rosenzweig 294a357b33 panfrost,asahi,radv: Don't set internal=true manually ... nir_builder_init_simple_shader does this automatically now. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Reviewed-by: Emma Anholt <emma@anholt.net> Acked-by: Rhys Perry <pendingchaos02@gmail.com> Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936>		2022-02-17 23:30:46 +00:00
..
addrlib	amd/addrlib: Use get_supported_arguments to get compiler args.	2021-11-24 07:03:54 +00:00
ci	radv/ci: update CI lists for CTS 1.3.1.0	2022-02-10 14:52:42 +00:00
common	radv: declare a new shader argument for loading the VRS rates	2022-02-16 08:11:15 +01:00
compiler	aco: implement nir_intrinsic_load_vrs_rates_amd	2022-02-16 08:11:19 +01:00
drm-shim	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00
llvm	ac/llvm: implement nir_intrinsic_load_vrs_rates_amd	2022-02-16 08:11:17 +01:00
registers	amd/registers: work around an assertion in parse_kernel_headers.py	2022-01-05 12:46:30 +00:00
vulkan	panfrost,asahi,radv: Don't set internal=true manually	2022-02-17 23:30:46 +00:00
.clang-format	radv: Add clang-format for AMD code.	2021-04-10 03:31:32 +02:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00