mesa/src/amd
Samuel Pitoiset 8d191b2cfb radv: fix creating BC image views when the base layer is > 0
When the base array layer of the image view is > 0, addrlib computes
the offset (in HwlComputeSubResourceOffsetForSwizzlePattern) which is
then added to the base VA in RADV. But if the driver doesn't reset
the base array layer, the hw will compute incorrect addressing
(ie. base array will be added twice). This also matches AMDVLK.

This fixes a VM fault followed by a GPU hang on RDNA2 when trying
to join a multiplayer game with medium settings in Halo Infinite.

Fixes: 98ba1e0d81 ("radv: Fix mipmap views on GFX10+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20761>
2023-01-19 12:46:07 +00:00
..
addrlib meson: Enable initialized-but-unused warning for MSVC 2022-11-17 21:20:38 +00:00
ci ci: bump vk cts to 1.3.3.1 + and a crash fix. 2023-01-17 04:23:08 +00:00
common ac: add TC_OP_ATOMIC_SUB_32 2023-01-18 13:36:50 +00:00
compiler aco: add support for fp32 addition atomics 2023-01-17 17:39:15 +00:00
drm-shim r300: use drm_shim_override 2022-11-16 14:37:47 +00:00
llvm ac/llvm: add support for fp32 addition atomics 2023-01-17 17:39:15 +00:00
registers amd/registers: regenerate gfx11 headers from amd-staging-drm-next 2022-11-04 00:42:08 +00:00
vulkan radv: fix creating BC image views when the base layer is > 0 2023-01-19 12:46:07 +00:00
.clang-format radv: Add nir_foreach_variable_with_modes to .clang-format 2022-12-09 07:07:10 +00:00
meson.build meson: build radeon drm-shim also for r300 and r600 2022-11-16 14:37:47 +00:00