mesa/src/broadcom
Jason Ekstrand 80e8dfe9de nir: Rename Boolean-related opcodes to include 32 in the name
This is a squash of a bunch of individual changes:

    nir/builder: Generate 32-bit bool opcodes transparently

    nir/algebraic: Remap Boolean opcodes to the 32-bit variant

    Use 32-bit opcodes in the NIR producers and optimizations

        Generated with a little hand-editing and the following sed commands:

        sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c
        sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c
        sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c
        sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c
        sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c
        sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c

     Use 32-bit opcodes in the NIR back-ends

        Generated with a little hand-editing and the following sed commands:

        sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c
        sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c
        sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c
        sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c
        sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c
        sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-12-16 21:03:02 +00:00
..
cle v3d: Add support for draw indirect for GLES3.1. 2018-12-14 17:48:01 -08:00
clif v3d: Dump the contents off all the buffers in CLIF mode. 2018-07-30 14:29:01 -07:00
common v3d: Emit the VCM_CACHE_SIZE packet. 2018-08-06 13:03:23 -07:00
compiler nir: Rename Boolean-related opcodes to include 32 in the name 2018-12-16 21:03:02 +00:00
qpu v3d: Do uniform pretty-printing in the QPU dump. 2018-12-14 17:48:01 -08:00
.editorconfig broadcom: add editorconfig 2017-07-25 14:44:52 -07:00
.gitignore broadcom/vc5: Introduce v3dx_macros.h and v3dx_pack.h headers. 2018-01-12 21:51:40 -08:00
Android.cle.mk android: broadcom/cle: export the broadcom top level path headers 2018-09-15 09:14:46 +02:00
Android.genxml.mk android: broadcom/genxml: fix collision with intel/genxml header-gen macro 2018-09-15 09:14:33 +02:00
Android.mk broadcom/genxml: Introduce a V3D packet/struct decoder. 2017-07-25 14:44:52 -07:00
Makefile.am configure: allow building with python3 2018-10-31 19:15:50 +00:00
Makefile.cle.am broadcom: Fix out-of-tree build include path 2017-10-05 15:03:11 -07:00
Makefile.genxml.am v3d: Merge the V3D 4.1 and 4.2 XML into V3D 3.3'x XML. 2018-06-29 13:36:28 -07:00
Makefile.sources v3d: Implement a small immediates optimization, based on VC4's. 2018-07-23 10:21:43 -07:00
Makefile.v3d.am v3d: Rename the driver files from "vc5" to "v3d". 2018-05-16 21:19:07 +01:00
meson.build vc4: Fix meson build when enabled without v3d. 2018-07-29 19:13:29 -07:00