Jianxun Zhang 09277c7ea6 blorp: Fix offset when ambiguating MCS buffer (xe2) ... The MCS region to ambiguate needs to shift 4KB from its starting address. The first 4KB is reserved for hardware. Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com> Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28919>		2024-06-15 14:57:59 +00:00
..
blorp	blorp: Fix offset when ambiguating MCS buffer (xe2)	2024-06-15 14:57:59 +00:00
ci	ci: add farm variable for devices in collabora farm	2024-06-07 14:32:49 +00:00
common	mi-builder: add read/write memory fencing support on Gfx20+	2024-06-13 11:04:31 +00:00
compiler	intel/fs: fix lower_simd_width for MOV_INDIRECT	2024-06-14 22:21:26 +00:00
decoder	intel/decoder: Add intel_print_group_custom_spacing()	2024-04-24 17:07:50 +00:00
dev	intel/xe2+: Enable native 64-bit integer arithmetic.	2024-05-31 09:14:01 -07:00
ds	u_trace: extend tracepoint end_of_pipe bit into flags	2024-05-30 06:38:04 +00:00
genxml	genxml: add MI_MEM_FENCE for Gfx20	2024-06-13 11:04:31 +00:00
isl	isl: Add AUX MCS encoding into aux modes (xe2)	2024-06-15 14:57:59 +00:00
nullhw-layer	docs: replace references to the deprecated VK_INSTANCE_LAYERS with the new VK_LOADER_LAYERS_ENABLE	2024-04-02 18:08:52 +00:00
perf	intel/perf: Add intel_perf_stream_read_samples()	2024-05-27 19:34:06 +00:00
shaders	meson: use glslang --depfile argument when possible	2024-05-20 17:34:17 +00:00
tools	intel/tools: Fix intel_dev_info --hwconfig switch	2024-06-06 00:41:13 +00:00
vulkan	mi-builder: add read/write memory fencing support on Gfx20+	2024-06-13 11:04:31 +00:00
vulkan_hasvk	mi-builder: rename relocated api	2024-06-13 11:04:31 +00:00
meson.build	intel: Only build shaders with anv and iris	2024-02-21 20:53:36 +00:00