Qiang Yu 7e1b804992 radeonsi: implement two lds base load intrinsics ... LDS will be accessed starting from esgs_ring which has offset 0. So ngg_scratch and ngg_emit base address is just the offset from the esgs_ring base. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17109>		2022-12-02 04:37:23 +00:00
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ac_llvm_build.c	ac/llvm: fix gfx11 fs input load for 16bit varying	2022-11-15 05:43:37 +00:00
ac_llvm_build.h	ac/llvm: Implement signed idot on GFX11.	2022-10-24 19:07:16 +00:00
ac_llvm_cull.c	ac,radeonsi: cull small lines in the shader using the diamond exit rule	2021-11-16 02:11:46 +00:00
ac_llvm_cull.h	radeonsi: fix view culling for wide lines	2021-11-16 02:11:45 +00:00
ac_llvm_helper.cpp	ac: use ResetAllOptionOccurrences instead of ResetCommandLineParser	2022-06-07 10:29:56 +00:00
ac_llvm_util.c	amd: rename enums ARCTURUS -> MI100, ALDEBARAN -> MI200	2022-11-06 17:20:39 -05:00
ac_llvm_util.h	ac: use ResetAllOptionOccurrences instead of ResetCommandLineParser	2022-06-07 10:29:56 +00:00
ac_nir_to_llvm.c	radeonsi: implement two lds base load intrinsics	2022-12-02 04:37:23 +00:00
ac_nir_to_llvm.h	ac/llvm: add a return value to ac_nir_translate	2022-08-31 00:09:37 +00:00
ac_shader_abi.h	radeonsi: use nir_lower_gs_intrinsics	2022-12-02 04:37:23 +00:00
meson.build	meson: use gnu_symbol_visibility argument	2020-06-01 18:59:18 +00:00