mesa/src/freedreno/isa
Rob Clark 5c98f110da ir3: Add new cat3 instructions
b13 encodes alternate opcode meanings for new instructions with
otherwise the same encoding (ie. src precision implied by opc).

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
2025-12-08 22:12:08 +00:00
..
encode.c ir3: Add mova.r encoding 2025-12-08 22:12:06 +00:00
ir3-cat0.xml ir3: Add (eostsc) 2025-12-08 22:12:03 +00:00
ir3-cat1.xml ir3: Add mova.r encoding 2025-12-08 22:12:06 +00:00
ir3-cat2.xml ir3: Add new cat2 instructions 2025-12-08 22:12:07 +00:00
ir3-cat3.xml ir3: Add new cat3 instructions 2025-12-08 22:12:08 +00:00
ir3-cat4.xml freedreno/isa: Convert to srcs/dsts 2021-06-23 17:20:29 +00:00
ir3-cat5.xml ir3: Assemble and disassemble .clp modifier 2025-09-05 16:58:09 +00:00
ir3-cat6.xml ir3: Fix gen8 ldc encoding 2025-12-08 22:12:06 +00:00
ir3-cat7.xml ir3/isa: ignore bit 54 in alias encoding 2025-07-01 14:07:59 +00:00
ir3-common.xml ir3/isa: allow rpt6/rpt7 2024-11-28 13:08:36 +00:00
ir3-disasm.c freedreno: Convert to SPDX-License-Identifier instead of pasting whole license 2024-08-28 08:54:00 +00:00
ir3.xml ir3: Support assembling/disassembling ray_intersection and resbase 2025-01-20 01:22:23 +00:00
isa.h freedreno: Convert to SPDX-License-Identifier instead of pasting whole license 2024-08-28 08:54:00 +00:00
meson.build build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00