mesa/src/intel
Kenneth Graunke 7ccc786acf intel/dev: Set minimum HS URB entries to 0.
The documentation for 3DSTATE_URB_HS has 0 as the minimum number of HS
URB entries for all platforms.  See BSpecs 32162, 47137, 56271 for
Gfx6-11, Xe, and Xe2-3, respectively.

This should silence warnings about our device info field not matching
the hwconfig tables.

Notably, nothing in our drivers currently uses this value so it cannot
have a functional impact.

Fixes: 4064b5546b ("intel/dev: reduce warning noise from urb settings")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33764>
2025-03-10 17:23:07 -07:00
..
blorp anv/iris: add drirc keys to disable VF/TE distribution 2025-02-27 21:10:59 +00:00
ci ci: Specify the FARM variable for DUT jobs 2025-03-08 02:45:02 +00:00
common intel: Add function to check if PXP is supported in Xe KMD 2025-03-06 16:25:04 +00:00
compiler intel: Move devinfo->has_compr4 into the elk compiler 2025-03-10 17:23:07 -07:00
decoder intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00
dev intel/dev: Set minimum HS URB entries to 0. 2025-03-10 17:23:07 -07:00
ds anv: Change as_build to show num tlas/blas 2025-03-05 14:19:56 +00:00
executor intel: Initialize upper 32bits of drm_xe_sync.handle 2025-02-02 21:34:45 -08:00
genxml genxml: simplify genX_rt_pack.h 2025-03-05 17:20:11 +00:00
isl intel: Delete devinfo->must_use_separate_stencil 2025-03-10 17:23:07 -07:00
nullhw-layer build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
perf intel/perf: add new perf consts to support more metrics 2025-01-16 00:01:56 +00:00
shaders intel: use common CL args 2025-03-06 00:43:59 +00:00
tools intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00
vulkan anv: Add support to create protected bo and protected exec_queue in Xe KMD 2025-03-06 16:25:03 +00:00
vulkan_hasvk anv,hasvk: switch to common VK_COPY/PRINT_STR 2025-03-01 20:27:26 +00:00
meson.build intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00