mesa/src/amd
Ruijing Dong 7e564fd963 radeonsi/vcn: vcn5 av1 decoding context buffer fix
In VCN5, the AV1 context buffer has changed to a bigger
one than VCN4. It fixed an AV1 decoding issue on VCN5.

Cc: mesa-stable

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36208>
(cherry picked from commit 32a2012975)
2025-07-30 11:31:11 +02:00
..
addrlib amd/addrlib: remove the DCC page fault workaround 2025-04-01 03:23:22 -04:00
ci ci/fluster: remove 3 pass cases resulted by gaps_in_frame 2025-07-30 11:31:10 +02:00
common radeonsi/vcn: vcn5 av1 decoding context buffer fix 2025-07-30 11:31:11 +02:00
compiler aco/ra: fix repeated compact_linear_vgprs() in get_reg() 2025-07-16 16:23:07 +02:00
drm-shim amd/drm-shim: add gfx1201 2025-03-10 11:21:36 +00:00
gmlib amd/gmlib: add gmlib for radeonsi 2025-02-27 03:15:16 +00:00
llvm ac/llvm: convert to integer after reductions 2025-06-18 17:55:47 +02:00
registers amd: Rename GFX1103_R1/R2 to PHOENIX/2 2024-11-20 02:14:40 +00:00
vpelib amd/vpelib: More parameters to the segmentation process and introduce validation hook 2025-03-06 02:11:53 +00:00
vulkan radv/video: Set correct H264/5 decode minCodedExtent 2025-07-16 16:23:12 +02:00
meson.build amd/gmlib: add gmlib for radeonsi 2025-02-27 03:15:16 +00:00