mesa/src/intel
Lionel Landwerlin 75c6ad9907 intel/fs: fixup sampler header message
If you look at the sampler message header on Gfx9+, you'll see that we
mostly only use 2 dwords (dw2 & dw3). DW2 has a bunch of sampler
parameters, DW3 is the sampler handle.

On Gfx9 we can micro optimize by copying r0 into the header because
the HW mostly doesn't care about other DWs. We just have to clear dw2
on non VS/FS stages.

On Gfx11+, we always have to do a careful copy of the r0.3 bits to
mask out the bottom unrelated bits. So there, just clearing the entire
header makes more sense.

On Xe2+, the dw4 of the header references the sampler feedback surface
handle and bit0 is a boolean to know whether to use that surface or
not. So it *REALLY* matters to have that as 0. If we copy r0, we'll
get random bits in dw4, leading to enable that surface.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28082>
2024-03-12 07:25:45 +00:00
..
blorp anv/iris/blorp: use the right MOCS values for each engine 2024-03-06 20:33:12 +00:00
ci ci/intel: split asus-cx9400-volteer into acer-cp514-2h-11{30,60}g7-volteer 2024-03-06 01:52:49 +00:00
common intel/elk: Remove multi-polygon support 2024-03-07 15:53:19 +00:00
compiler intel/fs: fixup sampler header message 2024-03-12 07:25:45 +00:00
decoder intel/decoder: Add ELK support 2024-02-24 00:24:31 +00:00
dev intel: Drop pre-production steppings 2024-03-11 18:52:44 +00:00
ds intel/ds: add pipe control reasons to perfetto flushes 2024-03-08 07:52:20 +00:00
genxml intel/genxml: update PIPE_CONTROL so that we can decode it on the CCS 2024-03-06 14:37:11 +00:00
isl anv/iris/blorp: use the right MOCS values for each engine 2024-03-06 20:33:12 +00:00
nullhw-layer intel/nullhw: Fix 32bits compilation warnings 2024-02-28 23:37:43 +00:00
perf intel: Remove unused ALIGN macro 2023-12-07 02:30:53 +00:00
shaders intel-clc: Use correct set of nir_options when building for Gfx8 2024-02-24 00:24:32 +00:00
tools intel/tools: avoid invalid time and file bits combination 2024-03-08 21:01:38 +00:00
vulkan anv/video: fix scan order for scaling lists on H265 decoding. 2024-03-12 03:33:49 +00:00
vulkan_hasvk intel/ds: add pipe control reasons to perfetto flushes 2024-03-08 07:52:20 +00:00
meson.build intel: Only build shaders with anv and iris 2024-02-21 20:53:36 +00:00