mesa/src/freedreno/ir3
Matt Turner 67808a69c6 freedreno/ir3: Use nir_opt_idiv_const
Notably reduces the number of instructions in manhattan31/377 by 101:

instructions helped:   shaders/closed/android/gfxbench/manhattan31/377.shader_test CL: 1700 -> 1599 (-5.94%)

total instructions in shared programs: 1713536 -> 1713313 (-0.01%)
instructions in affected programs: 7635 -> 7412 (-2.92%)
helped: 12
HURT: 9

total nops in shared programs: 377253 -> 377188 (-0.02%)
nops in affected programs: 3170 -> 3105 (-2.05%)
helped: 13
HURT: 8

total non-nops in shared programs: 1336283 -> 1336125 (-0.01%)
non-nops in affected programs: 3134 -> 2976 (-5.04%)
helped: 12
HURT: 4

total mov in shared programs: 66642 -> 66641 (<.01%)
mov in affected programs: 145 -> 144 (-0.69%)
helped: 1
HURT: 4

total cov in shared programs: 20215 -> 20223 (0.04%)
cov in affected programs: 64 -> 72 (12.50%)
helped: 0
HURT: 8

total dwords in shared programs: 3650282 -> 3649876 (-0.01%)
dwords in affected programs: 11222 -> 10816 (-3.62%)
helped: 12
HURT: 0

total constlen in shared programs: 246636 -> 246656 (<.01%)
constlen in affected programs: 72 -> 92 (27.78%)
helped: 0
HURT: 5

total cat0 in shared programs: 411874 -> 411809 (-0.02%)
cat0 in affected programs: 3414 -> 3349 (-1.90%)
helped: 13
HURT: 8

total cat1 in shared programs: 87109 -> 87116 (<.01%)
cat1 in affected programs: 398 -> 405 (1.76%)
helped: 1
HURT: 12

total cat2 in shared programs: 797105 -> 797030 (<.01%)
cat2 in affected programs: 1619 -> 1544 (-4.63%)
helped: 12
HURT: 0

total cat3 in shared programs: 348412 -> 348322 (-0.03%)
cat3 in affected programs: 404 -> 314 (-22.28%)
helped: 12
HURT: 0

total sstall in shared programs: 133300 -> 133302 (<.01%)
sstall in affected programs: 73 -> 75 (2.74%)
helped: 0
HURT: 1

total (ss) in shared programs: 36137 -> 36139 (<.01%)
(ss) in affected programs: 54 -> 56 (3.70%)
helped: 0
HURT: 2

total systall in shared programs: 323494 -> 323624 (0.04%)
systall in affected programs: 1591 -> 1721 (8.17%)
helped: 4
HURT: 2

total (sy) in shared programs: 14306 -> 14308 (0.01%)
(sy) in affected programs: 46 -> 48 (4.35%)
helped: 0

HURT: 2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18085>
2022-08-20 00:13:21 +00:00
..
tests ir3: Refactor ir3_compiler_create() to take an options struct 2022-03-17 12:15:45 +00:00
.dir-locals.el ir3: Update .editorconfig and .dir-locals.el 2021-07-12 20:57:21 +00:00
.editorconfig ir3: Update .editorconfig and .dir-locals.el 2021-07-12 20:57:21 +00:00
disasm-a3xx.c ir3: Implement and document ldc.k 2022-03-17 12:15:45 +00:00
instr-a3xx.h ir3: Implement and document ldc.k 2022-03-17 12:15:45 +00:00
ir3.c ir3: handle shared consts. 2022-07-24 09:03:47 +00:00
ir3.h ir3: set UL flag before ir3_lower_subgroups 2022-07-27 17:08:03 +00:00
ir3_a4xx.c Change all debug_assert calls to assert 2022-07-10 00:50:35 +00:00
ir3_a6xx.c freedreno/ir3: handle global atomics 2021-11-23 18:26:37 +00:00
ir3_array_to_ssa.c ir3: Reformat source with clang-format 2021-07-12 20:57:21 +00:00
ir3_assembler.c ir3: Remove ir3_shader_variant::shader 2022-05-13 17:07:05 +00:00
ir3_assembler.h freedreno/a6xx: Add EARLYPREAMBLE flag to all a6xx_sp_xs_ctrl_reg0 2022-05-18 11:17:47 +00:00
ir3_cf.c ir3: prohibit folding of half->full conversion into mul.s24/u24 2021-08-20 11:46:14 +00:00
ir3_compiler.c ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal. 2022-08-17 00:04:08 +00:00
ir3_compiler.h ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal. 2022-08-17 00:04:08 +00:00
ir3_compiler_nir.c ir3: set UL flag before ir3_lower_subgroups 2022-07-27 17:08:03 +00:00
ir3_context.c ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal. 2022-08-17 00:04:08 +00:00
ir3_context.h ir3: remove unused patch_vertices_in 2022-07-26 01:04:56 +00:00
ir3_cp.c Change all debug_assert calls to assert 2022-07-10 00:50:35 +00:00
ir3_cse.c ir3/cse: Support mov instructions 2021-10-20 15:19:15 +00:00
ir3_dce.c ir3: Never remove GS_HEADER_IR3 sysval input 2022-08-03 10:51:58 +00:00
ir3_delay.c ir3: Use (ss) for instructions writing shared regs 2022-01-07 14:26:08 +00:00
ir3_disk_cache.c freedreno/ir3: Enable load/store vectorization for SSBO access, too. 2022-06-01 22:19:44 +00:00
ir3_dominance.c ir3: Reformat source with clang-format 2021-07-12 20:57:21 +00:00
ir3_image.c freedreno/ir3: Fold 16-bit conversions into image load/store src/dsts. 2022-06-01 22:19:44 +00:00
ir3_image.h ir3: Reformat source with clang-format 2021-07-12 20:57:21 +00:00
ir3_legalize.c ir3: set UL flag before ir3_lower_subgroups 2022-07-27 17:08:03 +00:00
ir3_legalize_relative.c ir3: set UL flag before ir3_lower_subgroups 2022-07-27 17:08:03 +00:00
ir3_lexer.l freedreno/a6xx: Add EARLYPREAMBLE flag to all a6xx_sp_xs_ctrl_reg0 2022-05-18 11:17:47 +00:00
ir3_liveness.c freedreno/ir3: Cleanup liveness lifetime 2021-09-18 20:24:49 +00:00
ir3_lower_parallelcopy.c ir3: Add ir3_shader_variant::compiler 2022-05-13 17:07:05 +00:00
ir3_lower_spill.c ir3/lower_spill: Fix corner case with oob offsets 2022-03-15 21:36:38 +00:00
ir3_lower_subgroups.c ir3: Add support for subgroup arithmetic 2022-03-10 17:15:29 +00:00
ir3_merge_regs.c ir3: Initial support for spilling non-shared registers 2021-08-20 10:37:36 +00:00
ir3_nir.c freedreno/ir3: Use nir_opt_idiv_const 2022-08-20 00:13:21 +00:00
ir3_nir.h ir3: Add preamble optimization pass 2022-03-17 12:15:45 +00:00
ir3_nir_analyze_ubo_ranges.c Change all debug_assert calls to assert 2022-07-10 00:50:35 +00:00
ir3_nir_imul.py python: drop python2 support 2021-08-14 21:44:32 +00:00
ir3_nir_lower_64b.c freedreno/ir3: handle global atomics 2021-11-23 18:26:37 +00:00
ir3_nir_lower_io_offsets.c Change all debug_assert calls to assert 2022-07-10 00:50:35 +00:00
ir3_nir_lower_load_barycentric_at_offset.c ir3: Use non-persp interpolation when appropriate for interpolateAtOffset. 2022-07-11 16:56:05 +00:00
ir3_nir_lower_load_barycentric_at_sample.c ir3: Make sure to pass the interp_mode through in our load_bary lowering. 2022-07-11 16:56:05 +00:00
ir3_nir_lower_tess.c ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal. 2022-08-17 00:04:08 +00:00
ir3_nir_lower_tex_prefetch.c Change all debug_assert calls to assert 2022-07-10 00:50:35 +00:00
ir3_nir_lower_wide_load_store.c freedreno/ir3: Add wide load/store lowering 2021-10-21 18:59:57 +00:00
ir3_nir_move_varying_inputs.c Change all debug_assert calls to assert 2022-07-10 00:50:35 +00:00
ir3_nir_opt_preamble.c ir3, fd, tu: Copy misc. info from ir3_shader to ir3_shader_variant 2022-05-13 17:07:05 +00:00
ir3_nir_trig.py ir3: Make trig replacement expression exact 2021-09-17 15:45:29 +00:00
ir3_parser.y freedreno/a6xx: Add EARLYPREAMBLE flag to all a6xx_sp_xs_ctrl_reg0 2022-05-18 11:17:47 +00:00
ir3_postsched.c Change all debug_assert calls to assert 2022-07-10 00:50:35 +00:00
ir3_print.c ir3: Implement and document ldc.k 2022-03-17 12:15:45 +00:00
ir3_ra.c ir3/ra: Always insert interval for precolored inputs 2022-08-03 10:51:58 +00:00
ir3_ra.h ir3/ra: Fix ra_foreach_dst_n 2022-03-10 17:15:29 +00:00
ir3_ra_validate.c ir3: Reformat source with clang-format 2021-07-12 20:57:21 +00:00
ir3_remove_unreachable.c util/list: rename LIST_ENTRY() to list_entry() 2022-07-28 10:10:44 +00:00
ir3_sched.c util/list: rename LIST_ENTRY() to list_entry() 2022-07-28 10:10:44 +00:00
ir3_shader.c ir3: Suppress disasm of internal shaders unless IR3_SHADER_DEBUG=internal. 2022-08-17 00:04:08 +00:00
ir3_shader.h freedreno/ir3: Remove unneeded forward declaration 2022-08-02 23:46:15 +00:00
ir3_spill.c ir3: Add ir3_shader_variant::compiler 2022-05-13 17:07:05 +00:00
ir3_validate.c freedreno/ir3: Fix validation of half-precision image store values. 2022-06-01 22:19:44 +00:00
meson.build meson: remove source_root() call in nir compiler path 2022-08-12 13:11:03 +00:00