mesa/src/intel
Eric Engestrom 69d6923cdb [25.0 only] update ci expectations
These changes happened with no mesa code change, only infrastructure
changes, which is really weird, but to be able to move on, let's simply
document the "new normal".
2025-04-02 11:04:10 +02:00
..
blorp intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00
ci [25.0 only] update ci expectations 2025-04-02 11:04:10 +02:00
common intel/common: Retry GEM_CONTEXT_CREATE when PXP have not finished initialization 2025-03-15 09:49:01 +01:00
compiler brw: ensure VUE header writes in HS/DS/GS stages 2025-03-15 09:49:04 +01:00
decoder intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00
dev intel/brw: Use SHADER_OPCODE_SEND_GATHER in Xe3 2025-01-30 04:43:58 +00:00
ds intel : Expose Shader hashes for utrace and Perfetto 2025-01-10 17:38:16 +00:00
executor intel/executor: Fix typo when copying result into Lua table 2025-01-29 09:57:23 +00:00
genxml anv/xe3+: Set RegistersPerThread for bindless shader dispatch. 2025-01-29 23:39:32 +00:00
isl isl: use workaround framework for Wa_1207137018 2025-01-29 12:10:13 +00:00
nullhw-layer build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
perf intel/perf: add new perf consts to support more metrics 2025-01-16 00:01:56 +00:00
shaders clc,libagx: automatically set lang version 2025-01-28 23:01:32 +00:00
tools intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00
vulkan anv: fix non page aligned descriptor bindings on <Gfx12.0 2025-03-15 09:49:04 +01:00
vulkan_hasvk hasvk: disable logic op for float/srgb formats 2025-01-29 08:02:21 +00:00
meson.build intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00