anv: fix non page aligned descriptor bindings on <Gfx12.0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ab7641b8dc ("anv: implement descriptor buffer binding")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33911>
(cherry picked from commit de2a65ade6)
This commit is contained in:
Lionel Landwerlin 2025-03-06 11:30:16 +02:00 committed by Eric Engestrom
parent 0be9c89310
commit 2d96b368cd
2 changed files with 22 additions and 9 deletions

View file

@ -1574,7 +1574,7 @@
"description": "anv: fix non page aligned descriptor bindings on <Gfx12.0",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "ab7641b8dcbfee419b761abb27fe6fed476b4e05",
"notes": null

View file

@ -177,15 +177,22 @@ fill_state_base_addr(struct anv_cmd_buffer *cmd_buffer,
sba->BindlessSurfaceStateMOCS = mocs;
sba->BindlessSurfaceStateBaseAddressModifyEnable = true;
#else
/* We report descriptorBufferOffsetAlignment = 64, but
* STATE_BASE_ADDRESS::BindlessSurfaceStateBaseAddress needs to be
* aligned to 4096. Round down to 4096 here and add the remaining to the
* push constants descriptor set offsets in
* compute_descriptor_set_surface_offset().
*/
const uint64_t surfaces_addr =
cmd_buffer->state.descriptor_buffers.surfaces_address != 0 ?
cmd_buffer->state.descriptor_buffers.surfaces_address :
anv_address_physical(device->workaround_address);
ROUND_DOWN_TO(
cmd_buffer->state.descriptor_buffers.surfaces_address != 0 ?
cmd_buffer->state.descriptor_buffers.surfaces_address :
anv_address_physical(device->workaround_address),
4096);
const uint64_t surfaces_size =
cmd_buffer->state.descriptor_buffers.surfaces_address != 0 ?
MIN2(device->physical->va.dynamic_visible_pool.size -
(cmd_buffer->state.descriptor_buffers.surfaces_address -
device->physical->va.dynamic_visible_pool.addr),
(surfaces_addr - device->physical->va.dynamic_visible_pool.addr),
anv_physical_device_bindless_heap_size(device->physical, true)) :
(device->workaround_bo->size - device->workaround_address.offset);
sba->BindlessSurfaceStateBaseAddress = (struct anv_address) {
@ -2685,7 +2692,11 @@ compute_descriptor_set_surface_offset(const struct anv_cmd_buffer *cmd_buffer,
pipe_state->descriptor_buffers[set_idx].buffer_offset;
}
return pipe_state->descriptor_buffers[set_idx].buffer_offset << 6;
const uint32_t descriptor_buffer_align =
cmd_buffer->state.descriptor_buffers.surfaces_address % 4096;
return (descriptor_buffer_align +
pipe_state->descriptor_buffers[set_idx].buffer_offset) << 6;
}
ALWAYS_INLINE static uint32_t
@ -2742,8 +2753,10 @@ genX(flush_descriptor_buffers)(struct anv_cmd_buffer *cmd_buffer,
#if GFX_VERx10 < 125
struct anv_device *device = cmd_buffer->device;
push_constants->surfaces_base_offset =
(cmd_buffer->state.descriptor_buffers.surfaces_address -
device->physical->va.dynamic_visible_pool.addr);
ROUND_DOWN_TO(
cmd_buffer->state.descriptor_buffers.surfaces_address,
4096) -
device->physical->va.dynamic_visible_pool.addr;
#endif
cmd_buffer->state.push_constants_dirty |=