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Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233>
140 lines
4.6 KiB
C
140 lines
4.6 KiB
C
/*
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* Copyright © 2023 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "xe/intel_engine.h"
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#include <stdlib.h>
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#include "common/intel_gem.h"
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#include "common/xe/intel_device_query.h"
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#include "drm-uapi/xe_drm.h"
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static enum intel_engine_class
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xe_engine_class_to_intel(uint16_t xe)
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{
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switch (xe) {
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case DRM_XE_ENGINE_CLASS_RENDER:
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return INTEL_ENGINE_CLASS_RENDER;
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case DRM_XE_ENGINE_CLASS_COPY:
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return INTEL_ENGINE_CLASS_COPY;
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case DRM_XE_ENGINE_CLASS_VIDEO_DECODE:
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return INTEL_ENGINE_CLASS_VIDEO;
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case DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE:
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return INTEL_ENGINE_CLASS_VIDEO_ENHANCE;
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case DRM_XE_ENGINE_CLASS_COMPUTE:
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return INTEL_ENGINE_CLASS_COMPUTE;
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default:
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return INTEL_ENGINE_CLASS_INVALID;
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}
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}
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uint16_t
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intel_engine_class_to_xe(enum intel_engine_class intel)
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{
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switch (intel) {
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case INTEL_ENGINE_CLASS_RENDER:
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return DRM_XE_ENGINE_CLASS_RENDER;
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case INTEL_ENGINE_CLASS_COPY:
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return DRM_XE_ENGINE_CLASS_COPY;
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case INTEL_ENGINE_CLASS_VIDEO:
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return DRM_XE_ENGINE_CLASS_VIDEO_DECODE;
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case INTEL_ENGINE_CLASS_VIDEO_ENHANCE:
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return DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE;
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case INTEL_ENGINE_CLASS_COMPUTE:
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return DRM_XE_ENGINE_CLASS_COMPUTE;
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default:
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return -1;
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}
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}
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struct intel_query_engine_info *
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xe_engine_get_info(int fd)
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{
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struct drm_xe_query_engines *xe_engines;
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xe_engines = xe_device_query_alloc_fetch(fd, DRM_XE_DEVICE_QUERY_ENGINES, NULL);
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if (!xe_engines)
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return NULL;
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struct intel_query_engine_info *intel_engines_info;
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intel_engines_info = calloc(1, sizeof(*intel_engines_info) +
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sizeof(*intel_engines_info->engines) *
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xe_engines->num_engines);
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if (!intel_engines_info) {
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goto error_free_xe_engines;
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return NULL;
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}
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for (uint32_t i = 0; i < xe_engines->num_engines; i++) {
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struct drm_xe_engine_class_instance *xe_engine = &xe_engines->engines[i].instance;
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struct intel_engine_class_instance *intel_engine = &intel_engines_info->engines[i];
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intel_engine->engine_class = xe_engine_class_to_intel(xe_engine->engine_class);
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intel_engine->engine_instance = xe_engine->engine_instance;
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intel_engine->gt_id = xe_engine->gt_id;
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}
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intel_engines_info->num_engines = xe_engines->num_engines;
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free(xe_engines);
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return intel_engines_info;
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error_free_xe_engines:
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free(xe_engines);
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return NULL;
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}
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bool
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xe_engines_is_guc_semaphore_functional(int fd, const struct intel_device_info *info)
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{
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struct drm_xe_query_uc_fw_version uc_fw_version = {
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.uc_type = XE_QUERY_UC_TYPE_GUC_SUBMISSION,
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};
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struct drm_xe_device_query query = {
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.query = DRM_XE_DEVICE_QUERY_UC_FW_VERSION,
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.data = (uintptr_t)&uc_fw_version,
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.size = sizeof(uc_fw_version)
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};
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uint32_t read_ver, min_ver;
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if (intel_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query))
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return false;
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/* branch == 0 is mainline branch, any other branch value indicates that
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* other version numbers cannot be used to infer whether features or fixes
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* are present in the release.
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*
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* major, minor and patch are u8 for GuC, uAPI have it as u32 because of HuC.
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*/
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if (uc_fw_version.branch_ver == 0) {
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read_ver = uc_fw_version.major_ver << 16;
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read_ver |= uc_fw_version.minor_ver << 8;
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read_ver |= uc_fw_version.patch_ver;
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} else {
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read_ver = 0;
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}
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/* Requires at least GuC submission version 1.1.3 */
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min_ver = 1ULL << 16 | 1ULL << 8 | 3;
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return read_ver >= min_ver;
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}
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