fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-16 22:20:29 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

intel/executor: Fix bfloat example for converting F to packed BF

Browse source 
In float pointing rules adding +0.0f preserves all values except
for -0.0f, so what we want here is to add -0.0f.  In the future
we should add proper support for float immediates in the assembler.

Fixes: fafdd24285 ("intel/executor: Update bfloat example")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
(cherry picked from commit 3e0418ba02)
This commit is contained in:
Caio Oliveira 2025-04-23 09:21:10 -07:00 • committed by Eric Engestrom
parent 1f82af229d
commit bb56867a1b
2 changed files with 7 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -394,7 +394,7 @@
"description": "intel/executor: Fix bfloat example for converting F to packed BF",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "fafdd242850657d58ae66836ee5d154f1187fe8b",
"notes": null

10
src/intel/executor/examples/bfloat.lua
View file

@ -17,16 +17,18 @@ local r = execute {
add(8) g12<1>BF g11<1>BF g4<1>F {A@1};
// Converting F to packed BF doesn't work, so add the value
// to 0.0f instead. This will preserve the NaN.
// to -0.0f instead. This will preserve the NaN. Note +0.0f
// would not work since it doesn't preserve -0.0f!
add(8) g20<1>BF g4<1>F 0F {A@1}; // F -> BF.
mov(8) g20<1>UD 0x80000000UD {A@1}; // -0.0f.
add(8) g21<1>BF g4<1>F g20<1>F {A@1}; // F -> BF.
// Converting BF to F doesn't work, so for a packed source,
// shift-left the bits to expand it into an UD instead.
shl(8) g30<1>UD g20<1>UW 16UW {A@1}; // BF -> F.
shl(8) g30<1>UD g21<1>UW 16UW {A@1}; // BF -> F.
mad(8) g40<1>BF g12<1>BF g20<1>BF g5<1>F {A@1};
mad(8) g40<1>BF g12<1>BF g21<1>BF g5<1>F {A@1};
add(8) g41<1>BF g40<1>BF g30<1>F {A@1};
shl(8) g42<1>UD g41<1>UW 16UW {A@1}; // BF -> F.