Tapani Pälli 53e77d072b hasvk: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable ... Field must be disabled if any render targets have integer format. Cc: mesa-stable Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20671> (cherry picked from commit 58dd9d5134)		2023-01-24 15:27:05 -08:00
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blorp	intel/blorp: Lower base_workgroup_id to zero	2023-01-18 11:43:56 -08:00
ci	ci/iris: Add some recent flakes.	2023-01-04 21:18:08 +00:00
common	intel/common: Move i915 gem specific code to its own file	2022-12-23 18:22:29 +00:00
compiler	intel/compiler: Drop redundant 32-bit expansion for shared float atomics	2023-01-24 15:27:04 -08:00
dev	Revert "intel/compiler: fine-grained control of dispatch widths"	2023-01-12 00:33:25 +00:00
ds	intel/ds: add missing generate draws perfetto glue	2022-12-26 14:11:44 +02:00
genxml	intel/genxml: Drop CACHE_MODE_SS definition.	2023-01-12 21:48:40 +00:00
isl	intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)	2022-12-15 11:43:00 -08:00
nullhw-layer	utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*	2022-11-02 07:25:39 +00:00
perf	intel: add MTL performance metrics	2022-12-09 09:13:02 +00:00
tools	anv,hasvk: migrate align32 to the right functions from util	2023-01-06 17:22:16 +00:00
vulkan	anv: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable	2023-01-24 15:27:05 -08:00
vulkan_hasvk	hasvk: add restrictions for 3DSTATE_RASTER::AntiAliasingEnable	2023-01-24 15:27:05 -08:00
meson.build	intel: Disable SSE2 instruction set if building for non x86 architectures	2022-11-23 16:57:23 +00:00