Samuel Pitoiset 473732dfd1 radv: remove an old FIXME about a possible bug with TC-compat HTILE ... I added this FIXME 2 years ago because it was unclear if it was broken or not. Since, CTS coverage improved and the number of tests with depth/stencil on the compute queue increased a lot. vkd3d-proton also widely uses depth/stencil with GENERAL on GFX10+ and likely with async compute as well. No issues so far. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4048 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20785>		2023-01-20 17:07:26 +00:00
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addrlib	meson: Enable initialized-but-unused warning for MSVC	2022-11-17 21:20:38 +00:00
ci	ci/piglit: 2023-01-19 uprev	2023-01-19 23:46:44 +00:00
common	radv: rename ac_surf_nbc_view::max_mip to num_levels	2023-01-19 12:46:07 +00:00
compiler	meson: replace uses of ExternalProgram.path with .full_path	2023-01-19 16:29:03 +00:00
drm-shim	r300: use drm_shim_override	2022-11-16 14:37:47 +00:00
llvm	ac/llvm: add support for fp32 addition atomics	2023-01-17 17:39:15 +00:00
registers	amd/registers: regenerate gfx11 headers from amd-staging-drm-next	2022-11-04 00:42:08 +00:00
vulkan	radv: remove an old FIXME about a possible bug with TC-compat HTILE	2023-01-20 17:07:26 +00:00
.clang-format	radv: Add nir_foreach_variable_with_modes to .clang-format	2022-12-09 07:07:10 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00