Iago Toral Quiroga 42bd467906 broadcom/compiler: inform NIR scheduler about 0 cost ALU instructions ... Some ALU instructions will likely end up being copy propagated in the backend, which means they would not have any cost. This helps the scheduler make better decisions for the new open-coded patterns produced in NIR for extracts (i.e. unpack_2x16) with MR#39511. With this (together with previous patches) we manage to produce similar shader-db results as with the unpack_2x16 NIR extract opcodes that MR#39511 will drop. Reviewed-by: Juan A. Suarez <jasuarez@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39687>		2026-02-05 11:29:42 +00:00
..
meson.build	broadcom/compiler: optimize alu(shr(x, 16).l) to alu(x.h)	2026-02-05 11:29:42 +00:00
nir_to_vir.c	broadcom/compiler: don't always clear undefined bits from sub-32 integers	2026-02-05 11:29:42 +00:00
qpu_schedule.c	broadcom/compiler: enable umul24 and imul24 ALU opcodes	2025-11-26 13:32:39 +00:00
qpu_validate.c	broadcom/compiler: validate rtop + thrsw hazard	2024-06-27 06:43:09 +00:00
v3d_compiler.h	broadcom/compiler: optimize alu(shr(x, 16).l) to alu(x.h)	2026-02-05 11:29:42 +00:00
v3d_nir_lower_algebraic.py	broadcom/compiler: generate mali opcodes for clamping on Pi5	2024-10-03 09:02:08 +00:00
v3d_nir_lower_blend.c	nir/lower_blend: Move the format to nir_lower_blend_rt	2026-01-19 21:33:14 +00:00
v3d_nir_lower_image_load_store.c	treewide: simplify nir_def_rewrite_uses_after	2025-08-01 15:34:24 +00:00
v3d_nir_lower_io.c	nir/validate: expand IO intrinsic validation with nir_io_semantics	2025-11-02 02:21:46 +00:00
v3d_nir_lower_line_smooth.c	treewide: Switch to nir_progress	2025-02-26 15:19:53 +00:00
v3d_nir_lower_load_output.c	v3d/compiler: remove requirement for format information for fbfetch	2025-05-08 06:25:22 +00:00
v3d_nir_lower_load_store_bitsize.c	broadcom/compiler: ensure offset source exists	2024-12-16 10:56:38 +00:00
v3d_nir_lower_logic_ops.c	v3d/compiler: Only lower logic ops for color buffers that exist	2025-04-23 09:03:41 +00:00
v3d_nir_lower_scratch.c	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
v3d_nir_lower_txf_ms.c	nir: Take a nir_def * in nir_tex_instr_add_src()	2023-08-18 01:00:14 +00:00
v3d_packing.c	broadcom/compiler: add v3d_pack_unnormalized_coordinates helper	2023-10-31 13:00:34 +01:00
v3d_tex.c	broadcom/compiler: use skip_helpers with textures, UBOs and SSBOs	2026-01-08 12:59:44 +00:00
vir.c	broadcom/compiler: inform NIR scheduler about 0 cost ALU instructions	2026-02-05 11:29:42 +00:00
vir_dump.c	broadcom: only support v42 and v71	2023-11-02 11:59:08 +01:00
vir_live_variables.c	broadcom/compiler: update payload registers handling when computing live intervals	2023-10-13 22:37:42 +00:00
vir_opt_alu.c	broadcom/compiler: optimize alu(shr(x, 16).l) to alu(x.h)	2026-02-05 11:29:42 +00:00
vir_opt_constant_alu.c
vir_opt_copy_propagate.c	broadcom/compiler: disallow copy propagation of FMOV exclusive modifiers	2024-07-10 08:29:50 +02:00
vir_opt_dead_code.c	build: avoid redefining unreachable() which is standard in C23	2025-07-31 17:49:42 +00:00
vir_opt_redundant_flags.c	broadcom/qpu: define v3d_qpu_input, use on v3d_qpu_alu_instr	2023-10-13 22:37:41 +00:00
vir_opt_small_immediates.c	broadcom/compiler: don't use small immediates in geometry stages	2024-09-25 14:21:46 +00:00
vir_register_allocate.c	build: avoid redefining unreachable() which is standard in C23	2025-07-31 17:49:42 +00:00
vir_to_qpu.c	broadcom: only support v42 and v71	2023-11-02 11:59:08 +01:00