Marek Olšák a7ba36f589 ac/nir: get pass_tessfactors_by_reg from nir_gather_tcs_info ... If nir_tcs_info::all_invocations_define_tess_levels is true, the pass doesn't have to insert a barrier and use output loads to get tess level output values. It can just use the SSA defs that are being stored (or phis thereof) to get the tess level output values. The remaining tcs_info fields will be used by the HS shader message. Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171>		2024-11-16 21:58:29 -05:00
..
addrlib	ac: make sure VEGA20 and MI200 version ranges don't overlap with other chips	2024-09-27 19:21:55 +00:00
ci	radv/ci: document flakes seen recently	2024-11-13 12:26:49 +00:00
common	ac/nir: get pass_tessfactors_by_reg from nir_gather_tcs_info	2024-11-16 21:58:29 -05:00
compiler	aco: remove unused TCS fields from aco_shader_info	2024-11-16 21:58:26 -05:00
drm-shim	amd/drm-shim: add GFX1150 support	2024-08-13 13:17:17 +00:00
llvm	nir,aco,ac/llvm: add nir_op_alignbyte_amd	2024-11-13 12:59:26 +00:00
registers	amd: add gfx12 register definitions	2024-05-11 22:14:05 -04:00
vpelib	amd/vpelib: remove luma offset (#459)	2024-11-11 13:00:54 +08:00
vulkan	ac/nir: get pass_tessfactors_by_reg from nir_gather_tcs_info	2024-11-16 21:58:29 -05:00
meson.build	build: pass licensing information in SPDX form	2024-06-29 12:42:49 -07:00