Rhys Perry 8643388246 radv: fix 128bpp comp-to-single clears ... We were clearing GB to A, instead of R. This fixes some red tinting in Overwatch 2 when shadow quality is set to "Ultra". Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Fixes: 7451eb1d61 ("radv: implement DCC fast clears with comp-to-single") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9446 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400> (cherry picked from commit e2c7ce3719)		2023-08-18 12:08:35 +01:00
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addrlib	amd: update addrlib	2023-03-29 20:36:09 +00:00
ci	radv: do not use a pipe offset for aliased images	2023-06-01 16:49:13 +01:00
common	ac/nir/ngg: Call nir_convert_to_lcssa before divergence analysis.	2023-07-15 22:49:56 +01:00
compiler	aco: don't create sendmsg(dealloc_vgprs) if scratch is used	2023-08-16 14:49:57 +01:00
drm-shim	r300: use drm_shim_override	2022-11-16 14:37:47 +00:00
llvm	ac/llvm: fix AC_TM_CHECK_IR	2023-07-30 11:07:11 +01:00
registers	amd/registers: use gfx9 packet definitions for gfx940	2023-04-06 15:00:54 +00:00
vulkan	radv: fix 128bpp comp-to-single clears	2023-08-18 12:08:35 +01:00
.clang-format	amd: Add radv_foreach_stage to ForEachMacros.	2023-03-27 08:29:35 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00