mesa/src
Paul Berry 3da2c5123d i965/gs: Set force_writemask_all when setting up g0.
All geometry shaders begin this instruction:

    mov(1) g0.2<1>:ud 0x0:ud { align1 }

which sets up GRF0 properly for scratch reads and writes.  Since this
instruction has a SIMD size of 1, it will only have an effect if the
first channel is enabled.  In practice, the hardware seems to always
dispatch geometry shaders with the first channel enabled, but I can't
find anything in the docs to guarantee that.

So to be on the safe side, set force_writemask_all on the instruction,
which guarantees that it will have the desired effect regardless of
which channels are enabled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-10-24 22:00:37 -07:00
..
egl dri: Pass in the dlsym()ed driver extension to screen creation. 2013-10-24 14:04:20 -07:00
gallium freedreno/a3xx/compiler: relative addressing 2013-10-24 20:21:08 -04:00
gbm dri: Pass in the dlsym()ed driver extension to screen creation. 2013-10-24 14:04:20 -07:00
getopt
glsl glsl: set explicit_location correctly in lower_named_interface_blocks. 2013-10-24 22:00:32 -07:00
glx dri: Pass in the dlsym()ed driver extension to screen creation. 2013-10-24 14:04:20 -07:00
gtest gtest: Build it only for 'make check'. 2013-01-13 12:38:44 +01:00
mapi mesa: remove remnants of GL_MESA_shader_debug 2013-10-22 08:20:45 -06:00
mesa i965/gs: Set force_writemask_all when setting up g0. 2013-10-24 22:00:37 -07:00
Makefile.am gbm: Link to libwayland-drm if Wayland EGL platform is enabled 2013-08-12 15:16:22 -07:00
SConscript Remove libGLU 2012-08-31 10:58:15 -07:00