José Roberto de Souza def474e916 intel/genxml/gen12.5: Pipe_Control::Remove Global Snapshot Count Reset ... It was not meant to be used(Iris have assert for it) and it was removed from Pipe_Control instruction in gen12.5 and newer. BSpec: 47112 Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20444>		2022-12-29 08:34:25 -08:00
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blorp	intel/blorp: Fix a hang caused by invalid dispatch enables on gfx7	2022-12-23 10:17:04 +00:00
ci	ci/iris: add iris-kbl flake	2022-12-28 23:08:37 +00:00
common	intel/common: Move i915 gem specific code to its own file	2022-12-23 18:22:29 +00:00
compiler	intel/compiler: mark shader_record_ptr as uniform	2022-12-23 09:22:13 +00:00
dev	intel/dev: setup 1024 GS urb entries for ADL-N	2022-12-23 09:51:01 +00:00
ds	intel/ds: add missing generate draws perfetto glue	2022-12-26 14:11:44 +02:00
genxml	intel/genxml/gen12.5: Pipe_Control::Remove Global Snapshot Count Reset	2022-12-29 08:34:25 -08:00
isl	intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)	2022-12-15 11:43:00 -08:00
nullhw-layer	utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*	2022-11-02 07:25:39 +00:00
perf	intel: add MTL performance metrics	2022-12-09 09:13:02 +00:00
tools	intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument	2022-11-23 16:57:23 +00:00
vulkan	anv: Add and use emit_pipeline_select()	2022-12-29 08:34:15 -08:00
vulkan_hasvk	intel/common/intel_genX_state.h: Add intel_set_ps_dispatch_state()	2022-12-15 00:54:59 -08:00
meson.build	intel: Disable SSE2 instruction set if building for non x86 architectures	2022-11-23 16:57:23 +00:00