mesa/src/amd
Georg Lehmann 96b9f695d4 aco/isel: use upper bound for v_mul_u32_u24
The optimizer can use this.

Foz-DB Navi31:
Totals from 577 (0.73% of 79395) affected shaders:
Instrs: 4209237 -> 4206859 (-0.06%); split: -0.06%, +0.00%
CodeSize: 21511192 -> 21511984 (+0.00%); split: -0.02%, +0.02%
SpillSGPRs: 679 -> 671 (-1.18%)
Latency: 28448559 -> 28443863 (-0.02%); split: -0.04%, +0.03%
InvThroughput: 5221932 -> 5218443 (-0.07%); split: -0.09%, +0.02%
Copies: 297965 -> 298076 (+0.04%); split: -0.01%, +0.05%
VALU: 2385304 -> 2383500 (-0.08%)
SALU: 485553 -> 485533 (-0.00%); split: -0.01%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31245>
2024-09-19 17:08:47 +00:00
..
addrlib amd/addrlib: remove bogus assert in HwlComputeSlicePipeBankXor() 2024-09-19 07:52:36 +00:00
ci Uprev Piglit to e9ab30aeaed97b69868cf4d6d6a3f70f3b53c362 2024-09-19 15:41:32 +00:00
common amd/nir: add ac_nir_opt_shared_append 2024-09-19 16:21:47 +00:00
compiler aco/isel: use upper bound for v_mul_u32_u24 2024-09-19 17:08:47 +00:00
drm-shim amd/drm-shim: add GFX1150 support 2024-08-13 13:17:17 +00:00
llvm compiler: Allow derivative_group to be used for all stages in shader_info 2024-09-03 20:03:18 +00:00
registers amd: add gfx12 register definitions 2024-05-11 22:14:05 -04:00
vpelib amd/vpelib: Add 420 semi-planar 12bit handling 2024-08-26 19:57:15 +00:00
vulkan radv: Initialize sqtt state before meta state 2024-09-19 08:27:08 +00:00
meson.build build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00