Icenowy Zheng ee031d67b4 pvr: fix dirty tracking for stencil ops ... The dirty state of stencil ops is not checked when deciding whether to rebuild the ISP state, although the values are part of the ISP state (the 27:16 bits of ISPB word). Add MESA_VK_DYNAMIC_DS_STENCIL_OP to the condition for rebuilding ISP control registers. Fixes GLCTS tests when running on top of Zink: dEQP-GLES2.functional.fragment_ops.stencil.zero_stencil_fail Fixes: 88f1fad3f7 ("pvr: Use common pipeline & dynamic state frameworks") Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Reviewed-by: Simon Perretta <simon.perretta@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40623>		2026-03-28 19:39:01 +08:00
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ci	pvr, ci: Remove tests from expected failure list	2026-03-23 22:27:02 +00:00
common	pvr, pco: Commonize texture packing code	2026-02-27 09:08:29 +00:00
csbgen	pvr: add basic volcanic hw-definitions	2026-02-13 09:28:56 +00:00
drm-shim	pvr/drm-shim: avoid trying a random bvnc by default	2026-02-09 09:23:42 +00:00
include	pco: Use vertex input registers in register allocation	2026-02-24 16:27:45 +00:00
pco	pco: fix encoding of fred's s0abs bit	2026-03-25 14:37:19 +00:00
vulkan	pvr: fix dirty tracking for stencil ops	2026-03-28 19:39:01 +08:00
.clang-format	pco: Use vertex input registers in register allocation	2026-02-24 16:27:45 +00:00
.dir-locals.el
.editorconfig
meson.build	pvr: add support for drm-shim	2026-02-02 14:25:18 +00:00