mesa/src/intel
Alyssa Rosenzweig 4489ad0554 jay: clang-format
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42287>
2026-06-23 02:18:50 +00:00
..
blorp intel/gen: Generate opcodes and their metadata 2026-06-12 01:10:22 +00:00
ci rusticl: validate build/compile options before passing to backend 2026-06-16 23:02:34 +00:00
common intel: Add common utils for page fault reporting 2026-06-11 02:44:57 +00:00
compiler jay: clang-format 2026-06-23 02:18:50 +00:00
decoder intel/decoder: Print more information in shader's headline 2026-06-11 03:28:29 +00:00
dev intel: Add debug hook to dump out BVH after update 2026-06-15 18:27:03 -07:00
ds intel/test: Add support for Perfetto counter groups 2026-06-17 06:30:36 +00:00
executor intel/executor: Update to use gen module 2026-05-30 00:54:00 +00:00
genxml anv, iris: fix MOCS Index setting of EXECUTE_INDIRECT_* commands 2026-05-19 22:41:53 +00:00
isl intel/isl: Fix the initial state HiZ state for Xe2+ 2026-06-03 00:51:27 +00:00
mda intel/mda: Change the default output directory 2026-05-29 17:30:38 +00:00
nullhw-layer build: avoid redefining unreachable() which is standard in C23 2025-07-31 17:49:42 +00:00
perf intel/perf: Add WCL OA support 2026-06-09 19:34:54 +00:00
shaders anv: add Gfx9 support VK_EXT_device_generated_commands 2026-05-06 09:49:52 +00:00
tools intel/tools: fix stall_csv_filename maybe-unitialized error 2026-06-02 22:01:01 +00:00
vulkan anv: Add option to disable HiZ via drirc 2026-06-19 05:58:12 +00:00
vulkan_hasvk hasvk: use drirc_gen 2026-06-11 06:27:21 +00:00
meson.build intel: build compiler before blorp 2026-06-12 01:10:22 +00:00