mesa/src/intel
Tapani Pälli ddcd6b3834 anv: disable preemption on VFG, Wa_14015207028 for DG2
This workaround disables batch level preemption for Polygon,
Trifan and Lineloop primitive topologies.

v2: cleanups (José)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18456>
2022-09-14 10:01:23 +00:00
..
blorp intel/blorp: Set uses_sample_shading for MSAA blit shaders 2022-07-13 20:28:42 +00:00
ci ci: performance traces: make use of no-perf label 2022-09-13 09:16:19 +00:00
common anv: Do not duplicate intel_device_info memory in each logical device 2022-08-19 16:29:58 +00:00
compiler intel/compiler: Use brw_ud* helpers in thread payload code 2022-09-13 01:44:24 +00:00
dev intel/devinfo: Add MTL platforms enums and intel_device_info_is_mtl() 2022-09-13 00:30:22 +00:00
ds util/perf: move u_perfetto to here 2022-08-26 21:47:44 +00:00
genxml intel/genxml: add VFG_PREEMPTION_CHICKEN_BITS register 2022-09-14 10:01:23 +00:00
isl anv: fixup assertions on lowered storage formats 2022-08-23 08:29:51 +00:00
nullhw-layer intel/nullhw: Use correct macro to fix build regression 2022-08-01 10:54:38 +00:00
perf intel: fix typos found by codespell 2022-06-27 10:20:55 +00:00
tools intel/tools: Also look for 'batch' tag 2022-08-17 02:24:09 +00:00
vulkan anv: disable preemption on VFG, Wa_14015207028 for DG2 2022-09-14 10:01:23 +00:00
vulkan_hasvk hasvk: expose VK_EXT_depth_clamp_zero_one 2022-09-05 06:19:47 +00:00
meson.build intel: add a hasvk vulkan driver 2022-09-02 09:40:45 +00:00