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c8efd2b2cf
for validating our tables against register definitions Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
53 lines
1.4 KiB
C
53 lines
1.4 KiB
C
/*
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* Copyright © 2020 Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef AC_SHADOWED_REGS
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#define AC_SHADOWED_REGS
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#include "ac_gpu_info.h"
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struct radeon_cmdbuf;
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struct ac_reg_range {
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unsigned offset;
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unsigned size;
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};
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enum ac_reg_range_type
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{
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SI_REG_RANGE_UCONFIG,
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SI_REG_RANGE_CONTEXT,
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SI_REG_RANGE_SH,
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SI_REG_RANGE_CS_SH,
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SI_NUM_REG_RANGES,
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef void (*pm4_cmd_add_fn)(void *pm4_cmdbuf, uint32_t value);
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typedef void (*set_context_reg_seq_array_fn)(struct radeon_cmdbuf *cs, unsigned reg, unsigned num,
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const uint32_t *values);
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void ac_get_reg_ranges(enum amd_gfx_level gfx_level, enum radeon_family family,
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enum ac_reg_range_type type, unsigned *num_ranges,
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const struct ac_reg_range **ranges);
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void ac_emulate_clear_state(const struct radeon_info *info, struct radeon_cmdbuf *cs,
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set_context_reg_seq_array_fn set_context_reg_seq_array);
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void ac_print_nonshadowed_regs(enum amd_gfx_level gfx_level, enum radeon_family family);
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void ac_create_shadowing_ib_preamble(const struct radeon_info *info,
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pm4_cmd_add_fn pm4_cmd_add, void *pm4_cmdbuf,
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uint64_t gpu_address,
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bool dpbb_allowed);
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#ifdef __cplusplus
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}
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#endif
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#endif
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