Jianxun Zhang 02813f341b isl: Remove code for Xe2 from isl_gfx12.c ... Xe2 code is in isl_gfx20.* now. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11329 Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com> Reviewed-by: Rohan Garg <rohan.garg@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29702>		2024-06-21 04:02:08 +00:00
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blorp	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
ci	ci: Update trace SHAs	2024-06-19 01:56:23 +00:00
common	mi-builder: add read/write memory fencing support on Gfx20+	2024-06-13 11:04:31 +00:00
compiler	intel/fs/gfx20+: Fix surface state address on extended descriptors for NIR scratch intrinsics.	2024-06-21 01:49:43 +00:00
decoder	intel/decoder: Add intel_print_group_custom_spacing()	2024-04-24 17:07:50 +00:00
dev	intel/dev: Add compressed PAT entry	2024-06-21 01:19:12 +00:00
ds	u_trace: extend tracepoint end_of_pipe bit into flags	2024-05-30 06:38:04 +00:00
genxml	anv: Implement Wa_14019857787	2024-06-20 21:47:59 +00:00
isl	isl: Remove code for Xe2 from isl_gfx12.c	2024-06-21 04:02:08 +00:00
nullhw-layer	docs: replace references to the deprecated VK_INSTANCE_LAYERS with the new VK_LOADER_LAYERS_ENABLE	2024-04-02 18:08:52 +00:00
perf	intel/perf: Add intel_perf_stream_read_samples()	2024-05-27 19:34:06 +00:00
shaders	meson: use glslang --depfile argument when possible	2024-05-20 17:34:17 +00:00
tools	intel/tools: Fix intel_dev_info --hwconfig switch	2024-06-06 00:41:13 +00:00
vulkan	anv/xe: fix declaration of memory flags for integrated non-LLC platforms	2024-06-21 02:49:24 +00:00
vulkan_hasvk	intel/isl: Drop support for the gfx12 CCS ISL surf	2024-06-21 00:08:38 +00:00
meson.build	intel: Only build shaders with anv and iris	2024-02-21 20:53:36 +00:00