Commit graph

15202 commits

Author SHA1 Message Date
Jason Ekstrand
3943888c94 intel/isl: Ignore base_array_layer and array_len for 3D storage surfaces
The time we want to restrict the Z range of a 3-D surface is when rendering
to it.  For storage surfaces, we always want he full range.  However, we
still need to set MinimumArrayElement and RenderTargetViewExtent to
sensible values so we'll just set them to the reasonable defaults we used
before we started respecting the base_array_layer and array_len.

This fixes a bunch of Vulkan CTS regressions caused by 48f195d7c6.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97790
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-09-13 10:43:21 -07:00
Jason Ekstrand
d038adca0e intel/isl: Add support for RGB formats in X and Y-tiled memory
Normally, using a non-linear tiling format helps improve cache locality by
ensuring that neighboring pixels are usually close-by in memory.  For RGB
formats, this still sort-of holds, but it can also lead to rather terrible
memory access patterns where a single RGB pixel value crosses a tile
boundary and gets split into two pieces in different 4K pages.  It also
makes for some rather awkward calculations because your tile size is no
longer an even multiple of surface element size.  For these reasons, we
chose to simply never create tiled RGB images in the Vulkan driver.

The GL driver, however, is not so kind so we need to support it somehow.  I
briefly toyed with a couple of different schemes but this is the best one I
could come up with.  The fundamental problem is that a tile no longer
contains an integer number of surface elements.  I briefly considered a
couple other options but found them wanting:

 1) Using floats for the logical tile size.  This leads to potential
    rounding error problems.

 2) When presented with a RGB format, just make the tile 3-times as wide.
    This isn't so nice because now our tiles are no longer power-of-two
    size.  Also, it can force the row_pitch to be larger than needed which,
    while not strictly a problem for ISL, causes incompatibility problems
    with the way the GL driver chooses surface pitches.

The chosen method requires that you pay attention and not just assume that
your tile_info is in the units you think it is.  However, it's nice because
it provides a nice "these are the units" declaration in isl_tile_info
itself.  Previously, the tile_info wasn't usable as a stand-alone structure
because you had to also know the format.  It also forces figuring out how
to deal with inconsistencies between tiling and format back to the caller
which is good because the two different consumers of isl_tile_info really
want to deal with it differently:  Computation of the surface size wants
the fewest number of horizontal tiles possible while get_intratile_offset
is far more concerned with things aligning nicely.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Chad Versace <chadversary@chromium.org>
2016-09-12 19:44:05 -07:00
Jason Ekstrand
883086500b intel/isl: Allow valign2 for texture-only Y-tiled surfaces on gen7
The restriction that Y-tiled surfaces must have valign == 4 only aplies to
render targets but we were applying it universally.  This causes problems
if ISL_FORMAT_R32G32B32_FLOAT is used because it requires valign == 2; this
should be okay because you can't render to that format.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-09-12 19:44:05 -07:00
Jason Ekstrand
54db5afd2c intel/blorp: Work in terms of logical array layers
When Ivy Bridge introduced array multisampling, someone made the decision
to do lots of stuff throughout the driver in terms of physical array layers
rather than logical array layers.  In ISL, we use logical array layers most
of the time and it really makes no sense to use physical array layers in
the blorp API.  Every time someone passes physical array layers into blorp
for an array multisampled surface, they're always divisible by the number
of samples and we divide right away.

Eventually, I'd like to rework most of the GL driver internals to use
logical array layers but that's going to be a big project and will probably
happen as part of the ISL conversion.  For now, we'll do the conversion in
brw_blorp and let blorp just use the logical layers.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
fa4627149d intel/blorp: Increase the presision of coordinate transform calculations
The result of this calculation goes into an fma() in the shader and we
would like it to be as precise as possible.  The division in particular
was a source of imprecision whenever dst1 - dst0 was not a power of two.
This prevents regressions in some of the new Vulkan CTS tests for blitting
using a filtering of NEAREST.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
c70be1ead5 intel/blorp: Add a swizzle parameter to blorp_clear
While we're here, we also re-arrange the parameters to better match the
parameter order of blorp_blit.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
ea1399aba0 intel/blorp: Make color_write_disable const and optional
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
9286f62f11 intel/blorp: Add support for clearing R9G9B9E5 surfaces
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
ab03e59867 intel/blorp: Add support for RGB destinations in copies
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
5ae8043fed intel/blorp: Add an entrypoint for doing bit-for-bit copies
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
941b4d063a intel/blorp: Pull the guts of blorp_blit into a helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
4e03edf189 intel/blorp: Stop using the X/YOffset field of RENDER_SURFACE_STATE
While it can be useful, the field has substantial limtations.  In
particular, the bittom 2 or 3 bits is missing so your offset always has to
be a multiple of 4 or 8.  While surface alignments usually work out to make
this ok, when you start trying to fake compressed surfaces as uncompressed
(which we will want to do) this falls apart.  The easiest solution is to
simply align all offsets to a tile boundary and munge the regions we're
copying to account for the intratile offset.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
c170606fc6 intel/blorp: Use fake_interleaved_msaa in retile_w_to_y
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
a613449f71 intel/blorp: Use isl_get_interleaved_msaa_px_size_sa
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
8ac99eabb6 intel/isl: Add a helper for getting the size of an interleaved pixel
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
3cc15ba5bb intel/blorp: Handle 3D surfaces in convert_to_single_slice
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
43d25edf78 intel/isl: Fix an assert in get_intratile_offset_sa
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
6da968b651 intel/blorp: Fix the early return condition in convert_to_single_slice
The convert_to_single_slice operation is *mostly* idempotent.  The only
non-repeatable thing it does is that, when it sets the intratile offset
fields, it just overwrites them instead of doing a += operation.  This is
supposed to be ok because we have an early return at the top that should
make it bail of the surface is already a single slice.  Unfortunately, the
if condition has been broken ever since it was first added in 96fa98c18.
This commit fixes the condition and adds an assert to ensure we don't stomp
any non-zero intratile offsets.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
ec7e0d62c5 intel/blorp: Use the surface format for computing offsets
If we use the view format, it may be an uncompressed view of a compressed
image which throws things off.  Since we're computing offsets of images, we
want the actual surface offset anyway.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
7f2fecd114 intel/blorp: Don't assume R8_UINT in convert_to_single_slice
We're going to use it for more than just stencil textures

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
2fc9c7e3d9 intel/blorp: Take a destination swizzle in blorp_blit
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
2dba5489ae intel/blorp: Take an isl_swizzle instead of a SWIZZLE
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
7ddb21708c intel/isl: Add an isl_swizzle structure and use it for isl_view swizzles
This should be more compact than the enum isl_channel_select[4] that we
were using before.  It's also very convenient because we already had such a
structure in the Vulkan driver we just needed to pull it over.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand
2519237c24 intel/blorp: Handle the 512 layers restriction on Sandy Bridge
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:48:56 -07:00
Jason Ekstrand
48f195d7c6 intel/isl: Treat 3-D textures as 2-D arrays for rendering
In particular, this means that isl_view::base_array_layer and
isl_view::array_len get applied to 3-D textures but only when rendering.
We were already applying isl_view::base_array_layer for rendering into 3-D
textures so this isn't a huge deviation.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:48:56 -07:00
Sirisha Gandikota
63fe9ab894 aubinator: Simplify gen_disasm_create()'s devinfo handling
Copy the whole devinfo structure instead of just few fields (Ken)

Earlier, copied only couple of fields which added more code. So,
simplify code by copying the whole structure.

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:20:04 -07:00
Sirisha Gandikota
d2869c95fb aubinator: Fix compiler warning
Add 'const' qualifier to gen_field_iterator::p pointer (Ken)

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:19:56 -07:00
Jason Ekstrand
e2fb044115 intel/blorp: Add a TODO file
This provides a nice little place to share notes on what still needs to be
done and/or would be nice to have in BLORP.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 10:14:49 -07:00
Emil Velikov
ceaa2e1738 aubinator: rework print_help()
Rather than using platform specific methods to retrieve the program
name pass it explicitly. The function is called directly from main().

Similarly - basename comes in two versions POSIX (can modify string,
always pass a copy) and GNU (never modifies the string).

Just printout the complete program name, esp. since the program is not
meant to be installed. Thus using $basename is unlikely to work, not to
mention it is misleading.

Reported-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
2016-09-12 16:49:59 +01:00
Topi Pohjolainen
a1c7de09dc intel/blorp: Add plumbing for setting color clear layer count
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen
514afdce95 intel/blorp: Allow multiple layers
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen
e597821ef2 i965/blorp: Instruct vertex fetcher to provide prim instance id
This will indicate target layer (Render Target Array Index) needed
for layered clears.

v2: Use 3DSTATE_VF_SGVS for gen8+

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen
024a39511f isl/gen8+: Allow 1D and 3D auxiliary surfaces
Otherwise once mcs buffer gets allocated without delay for lossless
compression (same as we do for msaa), assert starts to fire in
piglit case: tex3d. The test uses depth of one which is in fact
supported even now.

v2 (Jason): Allow also 1D case as there is nothing in the specs
            constraining it either.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Jonathan Gray
d50c56f868 aubinator: only use program_invocation_short_name with glibc/cygwin
program_invocation_short_name is a gnu extension.  Limit use of it
to glibc and cygwin and otherwise use getprogname() which is available
on BSD and OS X.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-08 18:37:02 +01:00
Jonathan Gray
2d3ebb474c aubinator: include libgen.h for basename(3)
Include libgen.h for basename as required by posix.
The definition is not found on at least OpenBSD otherwise.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-08 18:37:02 +01:00
Jonathan Gray
0ba9e281fc aubinator: stop using non portable error() function
error() is a gnu extension and is not present on OpenBSD
and likely other systems.

Convert use of error to fprintf/strerror/exit.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-08 18:37:02 +01:00
Chad Versace
bad80c26e7 anv: Link to libX11-xcb only when unneeded
The Makefile unconditionally linked libX11-xcb into libvulkan_intel.so.
But it's needed only if HAVE_PLATFORM_X11.

Fixes build of libvulkan_intel.so on Chromium OS, which has no X11
libraries.

Fixes: 71258e9462 ("anv/x11: Add support for Xlib platform")
Cc: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-08 09:24:30 -07:00
Topi Pohjolainen
b863f4a39a intel/blorp: Allow single slice converter to suppress number of layers
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-08 08:53:45 +03:00
Jason Ekstrand
20b2f1ecb9 anv/pipeline: Lower indirect outputs when EmitNoIndirectOutput is set
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reported-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-06 08:27:23 -07:00
Mauro Rossi
98f734e758 android: intel: fix include paths in new "common" library
Fixes building error in libmesa_intel_common static library

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-03 20:03:16 -07:00
Jason Ekstrand
7e891f90c7 anv: Move cmd_buffer_config_l3 into anv_cmd_buffer.c
This is the only remaining part of genX_l3.c and there's really no good
reason for it to be in its own file.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
17968e2dfd anv/cmd_buffer: Move emit_lri and emit_lrm higher up
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
42d03c204c anv: Refactor pipeline l3 config setup
Now that we're using gen_l3_config.c, we no longer have one set of l3
config functions per gen and we can simplify a bit.  Also, we know that
only compute uses SLM so we don't need to look for it in all of the stages.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
6448c0e324 anv: Leverage the shared L3$ config code
When Jordan first implement L3$ configuration for Vulkan, he copied+pasted
from the GL driver because we had no good place to share it.  Now that we
have src/intel/common, we should be sharing these tables.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
49981891f7 intel: Pull the guts of gen7_l3_state.c into a shared helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
979d0aca62 intel: Rename brw_get_device_name/info to gen_get_device_name/info
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
527f371999 intel: s/brw_device_info/gen_device_info/
Generated by:

sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.c
sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.h
sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.c
sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.cpp
sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.h

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:06 -07:00
Jason Ekstrand
55364ab5b7 intel: Add a new "common" library for more code sharing
The first thing to go in this new library is brw_device_info.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:06 -07:00
Mauro Rossi
4218c32166 intel/blorp: fix typo in android makefile
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-03 08:22:53 -07:00
Lionel Landwerlin
2dc6930a5a isl: round format alignment to nearest power of 2
A few inline asserts in anv assume alignments are power of 2, but with
formats like R8G8B8 we have odd alignments.

v2: round up to power of 2 (Ilia)

v3: reuse util_next_power_of_two() from gallium/aux/util/u_math.h (Ilia)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-01 11:36:09 +01:00