Commit graph

164036 commits

Author SHA1 Message Date
Qiang Yu
7e1b804992 radeonsi: implement two lds base load intrinsics
LDS will be accessed starting from esgs_ring which has offset 0.
So ngg_scratch and ngg_emit base address is just the offset from
the esgs_ring base.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17109>
2022-12-02 04:37:23 +00:00
Qiang Yu
7bc56911f8 radeonsi: implement export_vertex abi
Used by ngg lower.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17109>
2022-12-02 04:37:23 +00:00
Qiang Yu
6cbb6e6397 radeonsi: implement nir_intrinsic_load_provoking_vtx_in_prim_amd
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17109>
2022-12-02 04:37:23 +00:00
Qiang Yu
3c1ebebeae radeonsi: use nir_lower_gs_intrinsics
Replace some llvm code.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17109>
2022-12-02 04:37:23 +00:00
David Heidelberg
224e9ce4a8 ci/zink: add missing spec@!opengl 1.1@masked-clear flake
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20119>
2022-12-02 03:16:31 +00:00
Giancarlo Devich
d3753aa336 wgl: Fix build break when LLVMPIPE and SOFTPIPE are both off
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20114>
2022-12-02 02:12:06 +00:00
David Heidelberg
5f94c36960 ci/cross: switch from the debcrossgen to the meson env2mfile
Modern Debian recommends to use `meson env2mfile` rather than `debcrossgen`:
```
WARNING: this tool is deprecated, use "meson env2mfile" instead.
```

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7740

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19863>
2022-12-02 00:33:10 +00:00
David Heidelberg
733498a4eb ci/arm_build: follow x86 and install newer Meson
This allows us utilize meson env2mfile.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19863>
2022-12-02 00:33:10 +00:00
David Heidelberg
9f551e4829 ci/meson: bump to 0.63.3
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19863>
2022-12-02 00:33:10 +00:00
David Heidelberg
0e7de16884 ci/x86: Remove meson from apt when we later install it with pip
But install Ninja, which is needed.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19863>
2022-12-02 00:33:10 +00:00
David Heidelberg
4ada7f0239 ci: CI should handle also arrays in meson cross-file
The new meson env2mfile generates everything in the arrays.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19863>
2022-12-02 00:33:10 +00:00
Eric Engestrom
43eab9252e meson: sort drivers alphabetically in any-of checks
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19977>
2022-12-01 23:53:08 +00:00
Eric Engestrom
5479234d45 meson: make long any-of checks easier to read and to update
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19977>
2022-12-01 23:53:08 +00:00
Eric Engestrom
8140eca23b meson: replace deprecated meson.get_cross_property(...) with meson.get_external_property(...)
According to the deprecation note:
> It's a pure subset of meson.get_external_property, and works strangely
> in host == build configurations, since it would be more accurately
> described as get_host_property.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19904>
2022-12-01 22:09:55 +00:00
Rhys Perry
9b6ab40b3b aco: improve do_pack_2x16() with zero constants
We can skip the v_or_b32 or use an instruction smaller than
v_alignbyte_b32.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19933>
2022-12-01 21:43:28 +00:00
Rhys Perry
917cfd587c aco: use v_minmax/v_maxmin opcodes
fossil-db (gfx1100):
Totals from 29868 (22.12% of 135032) affected shaders:
MaxWaves: 741336 -> 741344 (+0.00%)
Instrs: 34624902 -> 34539766 (-0.25%); split: -0.25%, +0.00%
CodeSize: 187196804 -> 187192100 (-0.00%); split: -0.01%, +0.01%
VGPRs: 1816860 -> 1816788 (-0.00%); split: -0.01%, +0.01%
Latency: 502597202 -> 502245627 (-0.07%); split: -0.08%, +0.01%
InvThroughput: 84813176 -> 84586122 (-0.27%); split: -0.28%, +0.01%
VClause: 633826 -> 633749 (-0.01%); split: -0.02%, +0.01%
SClause: 1317738 -> 1317047 (-0.05%); split: -0.06%, +0.01%
Copies: 2130610 -> 2130954 (+0.02%); split: -0.03%, +0.05%
Branches: 766093 -> 765969 (-0.02%); split: -0.02%, +0.00%
PreSGPRs: 1630250 -> 1630034 (-0.01%); split: -0.02%, +0.00%
PreVGPRs: 1590777 -> 1590664 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19933>
2022-12-01 21:43:28 +00:00
Rhys Perry
dfbc8e0192 aco: change order in combine_minmax()
Prepare for future optimizations.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19933>
2022-12-01 21:43:28 +00:00
Rhys Perry
ce5838599d aco/gfx11: use v_cvt_i32_i16/v_cvt_u32_u16
fossil-db (gfx1100):
Totals from 52753 (39.07% of 135032) affected shaders:
CodeSize: 153603860 -> 153163384 (-0.29%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19933>
2022-12-01 21:43:28 +00:00
Danylo Piliaiev
8f0177b334 ir3: Reduce the maximum allowed imm offset for shared var load/store
STL/LDL have 13 bits to store imm offset. However the most significant
bit in the offset is a sign bit, so the positive offset is limited by
12 bits.

nir_opt_offsets only has the upper limit and doesn't deal with
negative offsets, so shared_max should be changed to `(1 << 12) - 1`.

The issue was found in "Monster Hunter: World".

Fixes: 0b2da9d795
("ir3: Limit the maximum imm offset in nir_opt_offset for shared vars")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20100>
2022-12-01 18:52:01 +00:00
Connor Abbott
96ec79c7e3 tu: Don't prefetch descriptors for inline uniforms
This could result in hangs if the entire descriptor set was inline
uniforms. Fixes
dEQP-VK.binding_model.descriptorset_random.sets4.dynindexed.ubolimitlow.nosbo.nosampledimg.outimgonly.iublimitlow.nouab.comp.noia.0
after 0a0a04bd made us prefetch descriptors again and uncovered this.

Fixes: 37cde2c6 ("tu: Rewrite inline uniform implementation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20101>
2022-12-01 18:28:05 +00:00
Jasber Chen
1d3cb3f188 frontends/va: partially updating RefPicList depends on slice type
problem casused by one frame with multiple slices and different slices type.
Invalid referenced values came from slice P/I would overwrite previous update.

Signed-off-by: Jasber Chen <yipeng.chen@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19943>
2022-12-01 18:14:23 +00:00
Chia-I Wu
c0346ac170 Revert "freedreno/a6xx: Remove unneeded MSAA clear fallback"
This reverts commit ded82cf4bd and fixes

$ deqp-gles31 --deqp-gl-config-name=rgba8888d24s8ms4 \
    -n dEQP-GLES31.functional.primitive_bounding_box.depth.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20085>
2022-12-01 17:35:42 +00:00
Samuel Pitoiset
ab7f518ed0 radv,driconf: fix static driconf by parsing 00-radv-defaults.conf
Otherwise when xmlconfig is disabled, drirc workarounds aren't applied
with RADV.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7785
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20077>
2022-12-01 16:55:31 +00:00
Samuel Pitoiset
60ff0df39b driconf: add support for multiple input files in the static script
RADV has its own drirc file and this is required to fix the static
driconf path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20077>
2022-12-01 16:55:31 +00:00
Jordan Justen
686ada78cd intel/dev: Add (disabled) device info for MTL
Reworks:
 * Jordan: INTEL_PLATFORM_MTL_M/INTEL_PLATFORM_MTL_P
 * Lionel: .has_coarse_pixel_primitive_and_cb
 * Jordan: .has_mesh_shading & .has_ray_tracing
 * Paulo: .has_64bit_float
 * José: .has_integer_dword_mul (BSpec: 47431)
 * Jordan: Comment pci device ids for now similar to DG2:
   * 70a4e64685 ("intel: Add *disabled* device ids for DG2")
   * ad565f6b70 ("intel/dev: Enable first set of DG2 PCI IDs")

Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19658>
2022-12-01 16:22:47 +00:00
Matt Coster
d5740d85c4 pvr: debug: Print hexdump at the end of all sub buffers
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20040>
2022-12-01 15:05:59 +00:00
Matt Coster
b530a6b055 pvr: debug: Add option to zero-alloc all buffer objects
This is designed for use by the control stream dump debug option, but
can also be used any time deterministic buffer state is desired.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20040>
2022-12-01 15:05:59 +00:00
Matt Coster
eb44597c2c pvr: debug: Print hexdump for referenced buffers with unknown encoding
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20040>
2022-12-01 15:05:59 +00:00
Matt Coster
49bdc7f7f7 pvr: debug: Add offset address field type for dumps
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20040>
2022-12-01 15:05:59 +00:00
Matt Coster
e05b32d00c pvr: debug: Include hexdump after each block in control stream dump
This makes it easier to quickly identify the raw words associated with
decoded values.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20040>
2022-12-01 15:05:59 +00:00
Matt Coster
14c0f3de4c pvr: debug: Enhancements to hex dumps
Contains the following enhancements & fixes:
 - Increase (decrease?) the granularity to single bytes rather than
   using an arbitrary word size,
 - Remove some spurious semicolons at the end of macros, and
 - Do not collapse sections of zero bytes that consist of only a single
   line.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20040>
2022-12-01 15:05:59 +00:00
Karmjit Mahil
0009b37bf1 pvr: Remove a todo in vkCmdEndRenderPass2().
The first end_sub_cmd() is to make sure that we end the last sub_cmd.
The end_sub_cmd() in pvr_resolve_unemitted_resolve_attachments() makes
sure that we end any transfer sub_cmds created in there.

Suggested-by: Frank Binns <frank.binns@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19957>
2022-12-01 14:55:55 +00:00
Karmjit Mahil
e89be067b3 pvr: Replace sub_cmd flags with bools within each sub_cmd type.
This commit remove:
 - PVR_SUB_COMMAND_FLAG_TRANSFER_SERIALIZE_WITH_FRAG.
 - PVR_SUB_COMMAND_FLAG_OCCLUSION_QUERY.

The first flag was specific to transfer sub commands and the last
one, for graphics ones. Now we just have a bool in the transfer
sub_cmd, and one in the graphics sub_cmd.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19957>
2022-12-01 14:55:55 +00:00
Karmjit Mahil
8c9217e4d8 pvr: Handle PVR_SUB_COMMAND_FLAG_OCCLUSION_QUERY.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19957>
2022-12-01 14:55:55 +00:00
Karmjit Mahil
904a3c4dd7 pvr: Handle PVR_SUB_COMMAND_FLAG_TRANSFER_SERIALIZE_WITH_FRAG.
The flag was previously named PVR_SUB_COMMAND_FLAG_WAIT_ON_PREVIOUS_FRAG.
Since the next fragment job is also made to wait for the transfer
job to complete, the previous name might have been a bit misleading.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19957>
2022-12-01 14:55:55 +00:00
Iago Toral Quiroga
4276ec9f2a v3dv: fix job serialization for single sync path
The idea in the single sync path is that we serialize any job that
needs to wait, however, our ANY queue syncobj only tracks the last job
submitted to any hardware queue, so in practice when we wait on this
we are only serializing against the queue to which we have submitted
the last job, which is not correct.

Fix that by accumulating the last job sync into the ANY queue synbcobj
to ensure that waiting on this syncobj effectively waits on all
hardware queues.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20078>
2022-12-01 14:08:56 +00:00
Iago Toral Quiroga
95b9293eeb v3dv: make single-sync paths more explicit
Instead of having functions that return early in multi-sync mode
let's only call them when we are in single-sync mode. I think this
makes the code more explicit.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20078>
2022-12-01 14:08:56 +00:00
Boris Brezillon
93c084a99b panfrost: Add NATIVE_FENCE_FD cap
Add support for NATIVE_FENCE_FD so panfrost can advertise support for
EGL_ANDROID_native_fence_sync.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19774>
2022-12-01 13:52:05 +00:00
Boris Brezillon
8910533a5a panfrost: Move fence code to pan_fence.{c,h}
Before adding support for NATIVE_FENCE_FD, let's move the fencing logic
to a dedicated file to avoid spreading the code in different places.

Suggested-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19774>
2022-12-01 13:52:05 +00:00
Boris Brezillon
3bd0f5c502 panfrost: Destroy panfrost_context::syncobj in the ctx desctruction path
Destroy panfrost_context::syncobj in the ctx desctruction path so we
don't leak a sync object.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19774>
2022-12-01 13:52:05 +00:00
Qiang Yu
076a333d40 ac/nir/ngg: rename nogs 16bit output mask and var
To represent 16bit outputs more clearly.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
2022-12-01 13:10:35 +00:00
Qiang Yu
abe2e99e9e ac/nir/ngg: gs support 16bit outputs
radeonsi uses 16bit varying slots.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
2022-12-01 13:10:35 +00:00
Qiang Yu
68519891a7 ac/nir/ngg: gs skip check bit size before nir_u2u
nir_u2u do for us.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
2022-12-01 13:10:35 +00:00
Qiang Yu
d3e20e8834 ac/nir/ngg: gs store output use src_type index for type info
More precise type info, can be used for 16bit output streamout
to convert 16bit int/uint/float to 32bit one later.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
2022-12-01 13:10:35 +00:00
Qiang Yu
0cb5ea512f ac/nir/ngg: gs use u_foreach_bit64 to loop all output slots
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
2022-12-01 13:10:35 +00:00
Qiang Yu
13b75594d7 ac/nir/ngg: reduce nogs 16bit output gather space
Max slot number for 16bit output is 16, so no need to use
64 array size for them.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
2022-12-01 13:10:35 +00:00
Jason Ekstrand
b67fdcdfbc util/dynarray: Add an append_array helper
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19685>
2022-12-01 12:26:27 +00:00
Marcin Ślusarz
db0e6f9a07 intel/compiler: user payload starts after TUE header & its padding
All data written by the user are offset by TUE header size.
Without this patch we copy the correct amount of user data, but both
"from" and "to" offsets are wrong.

Fixes: 37e78803d7 ("intel/compiler: use nir_lower_task_shader pass")

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19409>
2022-12-01 11:19:47 +00:00
Marcin Ślusarz
f6adfd6278 nir/lower_task_shader: allow offsetting of the start of payload
We need this, because on Intel task payload starts with private header,
followed by user-accessible data.

Fixes: 37e78803d7 ("intel/compiler: use nir_lower_task_shader pass")

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19409>
2022-12-01 11:19:47 +00:00
Marcin Ślusarz
7aaafaa8ae intel/compiler: adjust [store|load]_task_payload.base too
Base also needs to be converted from bytes to words.

Fixes: c36ae42e4c ("intel/compiler: Use nir_var_mem_task_payload")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19409>
2022-12-01 11:19:47 +00:00