Commit graph

198516 commits

Author SHA1 Message Date
Felix DeGrood
faddb5d497 anv/pps: remove assert for double init
pps initializes perf counter multiple times, once from
GpuDataSource::register_data_source and once from
GpuDataSource::OnSetup. This is fine, except we should replace
failing assert with skip on second call.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38224>
2025-11-04 20:54:34 +00:00
Konstantin Seurer
b962063d72 nir: Remove nir_parallel_copy_instr
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Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36483>
2025-11-04 18:51:51 +00:00
Konstantin Seurer
3f3faa82b8 nir/from_ssa: Stop using nir_parallel_copy_instr
nir_parallel_copy_instr can be emulated using an intrinsic for each
entry and an array of arrays that is used by the pass to remember which
copies belong together.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36483>
2025-11-04 18:51:50 +00:00
Konstantin Seurer
b20fd0ef48 nir: Remove parallel copy handling from rewrite_uses_to_load_reg
Parallel copies are only created by nir_convert_from_ssa which does not
use the helper.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36483>
2025-11-04 18:51:50 +00:00
Ian Romanick
67a6fc0160 nir/opt_if: See through inot
Consider

    if (!x) {
       if (x) {
          ...
       }
    }

The inner use of `x` must be false, but so far only instances of `!x`
would have been replaced with a constant. See through the `inot` to
replace instances of `x` as well.

shader-db:

Lunar Lake
total instructions in shared programs: 17205147 -> 17204908 (<.01%)
instructions in affected programs: 56037 -> 55798 (-0.43%)
helped: 79 / HURT: 79

total cycles in shared programs: 879847886 -> 879992944 (0.02%)
cycles in affected programs: 5244138 -> 5389196 (2.77%)
helped: 141 / HURT: 125

Meteor Lake, DG2, and Tiger Lake had similar results. (Meteor Lake shown)
total instructions in shared programs: 19968312 -> 19968069 (<.01%)
instructions in affected programs: 65698 -> 65455 (-0.37%)
helped: 88 / HURT: 104

total cycles in shared programs: 884331007 -> 884469865 (0.02%)
cycles in affected programs: 4839695 -> 4978553 (2.87%)
helped: 172 / HURT: 136

LOST:   3
GAINED: 0

Ice Lake, Skylake, and Broadwell had similar results. (Ice Lake shown)
total instructions in shared programs: 20809765 -> 20809473 (<.01%)
instructions in affected programs: 65976 -> 65684 (-0.44%)
helped: 89 / HURT: 102

total cycles in shared programs: 872466849 -> 872433762 (<.01%)
cycles in affected programs: 5452888 -> 5419801 (-0.61%)
helped: 157 / HURT: 133

total spills in shared programs: 4014 -> 4010 (-0.10%)
spills in affected programs: 30 -> 26 (-13.33%)
helped: 1 / HURT: 0

total fills in shared programs: 3769 -> 3765 (-0.11%)
fills in affected programs: 50 -> 46 (-8.00%)
helped: 1 / HURT: 0

LOST:   3
GAINED: 1

fossil-db:

All Intel platforms had similar results. (Lunar Lake shown)
Totals:
Instrs: 910122459 -> 910097570 (-0.00%); split: -0.00%, +0.00%
Subgroup size: 40045664 -> 40046176 (+0.00%)
Send messages: 40724361 -> 40724036 (-0.00%)
Loop count: 970500 -> 970054 (-0.05%)
Cycle count: 105785543442 -> 105794147978 (+0.01%); split: -0.02%, +0.02%
Spill count: 3426093 -> 3426032 (-0.00%); split: -0.00%, +0.00%
Fill count: 6525296 -> 6525210 (-0.00%); split: -0.00%, +0.00%
Max live registers: 188561553 -> 188519064 (-0.02%); split: -0.02%, +0.00%
Max dispatch width: 47958304 -> 47958496 (+0.00%); split: +0.00%, -0.00%
Non SSA regs after NIR: 227303232 -> 227296055 (-0.00%); split: -0.00%, +0.00%

Totals from 15417 (0.78% of 1977988) affected shaders:
Instrs: 16984488 -> 16959599 (-0.15%); split: -0.20%, +0.05%
Subgroup size: 512 -> 1024 (+100.00%)
Send messages: 900193 -> 899868 (-0.04%)
Loop count: 23059 -> 22613 (-1.93%)
Cycle count: 1200149390 -> 1208753926 (+0.72%); split: -1.48%, +2.20%
Spill count: 25838 -> 25777 (-0.24%); split: -0.29%, +0.06%
Fill count: 43627 -> 43541 (-0.20%); split: -0.28%, +0.08%
Max live registers: 2550741 -> 2508252 (-1.67%); split: -1.75%, +0.08%
Max dispatch width: 296736 -> 296928 (+0.06%); split: +0.08%, -0.02%
Non SSA regs after NIR: 3264670 -> 3257493 (-0.22%); split: -0.25%, +0.03%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38196>
2025-11-04 18:04:00 +00:00
Faith Ekstrand
27d9e4ec2a nvk: VK_EXT_shader_uniform_buffer_unsized_array
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Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38230>
2025-11-04 17:25:04 +00:00
Georg Lehmann
83e9ae2d5c radv: do not report wave32 in gl_SubgroupSize for Doom Dark Ages
The shaders in question use:

(memory_load + (gl_SubgroupSize - 1)) & ~(gl_SubgroupSize - 1)

My guess is that this is supposed to be the subgroup size of whatever
produced the value, not the subgroup size in this shader.
And because in the consumer the workgroup size is 32, we use wave32.

Fixes: a2d3cbac2a ("radv: determine subgroup/wave size early")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14187

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38214>
2025-11-04 16:52:13 +00:00
Yiwei Zhang
763d2418b8 panvk: fix sample shading of internal blend shader for MSAA
Align with gallium side. When fixed-function blending is not available,
the internal blend shader is used. This is handled by a single ST_TILE
in the blend shader with the current sample ID, which requires sample
shading enablement.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38129>
2025-11-04 16:31:32 +00:00
David Rosca
00b8fad3d3 radeonsi/vcn: Fix creating context buffer on VCN5
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VCN5 needs the context buffer for AV1 encode and when pre-encode
is enabled.
Replace the check for dpb slots (which is always 0 on VCN5) with
check for first encoded frame.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14186
Fixes: a0324576aa ("radeonsi/vcn: Stop using rvid_buffer")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38072>
2025-11-04 14:59:16 +00:00
Alyssa Rosenzweig
17355f716b treewide: use UTIL_DYNARRAY_INIT
Instead of util_dynarray_init(&dynarray, NULL), just use
UTIL_DYNARRAY_INIT instead. This is more ergonomic.

Via Coccinelle patch:

    @@
    identifier dynarray;
    @@

    -struct util_dynarray dynarray = {0};
    -util_dynarray_init(&dynarray, NULL);
    +struct util_dynarray dynarray = UTIL_DYNARRAY_INIT;

    @@
    identifier dynarray;
    @@

    -struct util_dynarray dynarray;
    -util_dynarray_init(&dynarray, NULL);
    +struct util_dynarray dynarray = UTIL_DYNARRAY_INIT;

    @@
    expression dynarray;
    @@

    -util_dynarray_init(&(dynarray), NULL);
    +dynarray = UTIL_DYNARRAY_INIT;

    @@
    expression dynarray;
    @@

    -util_dynarray_init(dynarray, NULL);
    +(*dynarray) = UTIL_DYNARRAY_INIT;

Followed by sed:

    bash -c "find . -type f -exec sed -i -e 's/util_dynarray_init(&\(.*\), NULL)/\1 = UTIL_DYNARRAY_INIT/g' \{} \;"
    bash -c "find . -type f -exec sed -i -e 's/util_dynarray_init( &\(.*\), NULL )/\1 = UTIL_DYNARRAY_INIT/g' \{} \;"
    bash -c "find . -type f -exec sed -i -e 's/util_dynarray_init(\(.*\), NULL)/*\1 = UTIL_DYNARRAY_INIT/g' \{} \;"

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38189>
2025-11-04 13:39:48 +00:00
Alyssa Rosenzweig
f6f23dfdd1 util: add UTIL_DYNARRAY_INIT sentinel
We have the invariant that zero-initializing is legal but it's not
obvious in the source code, so add a sentinel value for it to make code
that uses it crystal clear.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38189>
2025-11-04 13:39:48 +00:00
Lionel Landwerlin
6f138fe723 anv: avoid null pointer access in utrace copies on CCS
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3e0ad0176b ("anv: Emit state cache invalidation after every compute dispatch")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38235>
2025-11-04 13:17:44 +00:00
Lionel Landwerlin
df5f92d114 u_trace: reserve chunk space before emitting copies
Some implementations can emit tracepoints when copying u_trace
buffers. It's important to reserve the slots we want to copy into
before emitting the copies so that both processes don't clash with one
another.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38199>
2025-11-04 12:49:04 +00:00
Danylo Piliaiev
2798ef7bfd vulkan: Always fill DS state for EXT_dynamic_rendering_unused_attachments
If renderpass has D/S attachment, but pipeline has D/S as UNDEFINED,
D/S should be properly disabled for the pipeline. The easiest way is to
ensure that D/S state is valid when pipeline's D/S format is UNDEFINED.
So we always create VkPipelineDepthStencilStateCreateInfo.

CC: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37550>
2025-11-04 12:03:11 +01:00
Georg Lehmann
22dc06798b aco/optimizer: never unfuse fma
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This shouldn't change anything in practice, and reducing precision
if precise isn't set is weird.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38183>
2025-11-04 07:54:02 +00:00
Georg Lehmann
6610905b43 aco: allow v_fma_mix with denorms for gfx9 chips where it's fused
Only unfused mad unconditionally flushes denorms.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38183>
2025-11-04 07:54:02 +00:00
Georg Lehmann
75e7fb03a5 aco: fix v_mad_mix denorm behavior
It also flushes fp32 denorms, just like v_mad_f32.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38183>
2025-11-04 07:54:02 +00:00
Samuel Pitoiset
95b9801ad2 radv/sqtt: do not try to resize the SQTT buffer for per-submit captures
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Doesn't make sense to try that and it will fail later anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38188>
2025-11-04 06:57:38 +00:00
Tapani Pälli
ed34f91545 anv: implement autostrip disable for Wa_14024997852
Note that currently autostrip is disabled globally with
Wa_14021490052 for some gfx versions and steppings.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
2025-11-04 05:17:30 +00:00
Tapani Pälli
7d9cf48fd7 iris: implement autostrip disable for Wa_14024997852
Note that currently autostrip is disabled globally with
Wa_14021490052 for some gfx versions and steppings.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
2025-11-04 05:17:30 +00:00
Tapani Pälli
0ff1dd9e0c intel/genxml: add registers handling autostrip for gfx200
These registers need to be whitelisted by kernel so that we can use
it to disable autostrip at will. This is about Wa_14024997852.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
2025-11-04 05:17:30 +00:00
Tapani Pälli
9a71dcde1b intel/dev: update mesa_defs.json from internal database
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
2025-11-04 05:17:30 +00:00
Ryan Houdek
455eb2c751 freedreno/fdl: Fix typo in tiled_to_linear_2cpp
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The non-aarch64 path was copying in the wrong direction.

Fixes: 7a5a33e0e3 ("freedreno/fdl: Add tiling/untiling implementation for a6xx/a7xx")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38226>
2025-11-04 02:48:35 +00:00
stefan11111
37f1d19a68 glx: Add some NULL pointer checks
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This prevents mesa from segfaulting if GLX is working on some screens, but not all screens.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: stefan11111 <stefan11111@shitposting.expert>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38201>
2025-11-04 00:21:19 +00:00
Mel Henning
041216e605 nak/opt_lop: Don't handle modifiers in dedup_srcs
The handling in dedup_srcs was incorrect because it would apply the
modifier from srcs[i] to the LUT without removing the modifier from the
instruction. We can fix and simplify this code by removing all modifiers
before the dedup_srcs() call, which we were doing immediately after the
call anyway.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13966
Fixes: 66c9c40f68 ("nak: Handle modifiers in dedup_srcs() in opt_lop()")
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Reviewed-by: Lorenzo Rossi <git@rossilorenzo.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38220>
2025-11-03 22:46:11 +00:00
Mel Henning
4b1303e29d nak/nvdisasm_tests: Test plop3
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Reviewed-by: Lorenzo Rossi <git@rossilorenzo.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38220>
2025-11-03 22:46:11 +00:00
Lionel Landwerlin
53834ccb6a brw: disable io_semantic validation for mesh intrinsics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2f6b4803ab ("nir/validate: expand IO intrinsic validation with nir_io_semantics")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38222>
2025-11-03 21:28:22 +00:00
Dylan Baker
74018f41ab anv: try to help coverity understand we're not racing
Coverity notices that in this case part of the decision to go down the
locked path invovles reading a flag, which is turn set inside the
protected code. Additional threads can decide they need to go down the
locked path, and then wait on the lock, even though the first thread
willse the device_registered to true, which would have otherwise
prevented them from going down the locked path.

What Coverity doesn't know, is that it is a violation of the Vulkan API
contract to call this function from two different threads, so in
practice that cann't happen. We'll move the setting of the
image_device_registered out of the locked area to see if that pacifies
Coverity, and if not then we'll just ignore it.

CID: 1662067
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37582>
2025-11-03 20:00:31 +00:00
Konstantin Seurer
aa28fcb610 llvmpipe: Always recompute 1/w
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The value depends on the tgsi_interpolate_loc which is not constant for
the loop. llvm should be able to cse in cases where they are the same.

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38197>
2025-11-03 19:45:29 +01:00
Konstantin Seurer
4d30da6599 gallivm/nir/soa: Use the sign of src1 for imod
This is the behavior specified by the nir opcode, the spirv spec and
required by maintenance8.

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38197>
2025-11-03 19:45:25 +01:00
Konstantin Seurer
25e678a37d lavapipe: Bump MAX_DESCRIPTOR_UNIFORM_BLOCK_SIZE
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38197>
2025-11-03 19:45:21 +01:00
Konstantin Seurer
d6dd96e1c7 lavapipe: Zero image null descriptors
The size queries for images do not use function pointers so we need to
be careful that width, height and depth are 0.

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38197>
2025-11-03 19:45:17 +01:00
Konstantin Seurer
ff145d2ddc lavapipe: Bump maxPrimitiveCount
The vulkan spec requires at least 2^29-1.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14212
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38197>
2025-11-03 19:44:46 +01:00
Daniel Schürmann
43f1ad308a radv/shader_info: repack and compact struct radv_shader_info
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using pahole.

Reduces the size of radv_shader_info from 760 bytes to 640 bytes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37931>
2025-11-03 13:38:38 +01:00
Daniel Schürmann
e1bcbbf3dd radv/shader_info: rename gs_ring_info -> legacy_gs_info and use union with ngg_info
Reduces the size of radv_shader_info from 784 bytes to 760 bytes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37931>
2025-11-03 13:38:38 +01:00
Daniel Schürmann
9b34da3da8 radv/shader_info: use union for precomputed register values of non-overlapping stages
Reduces the size of radv_shader_info from 872 bytes to 784 bytes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37931>
2025-11-03 13:38:38 +01:00
Daniel Schürmann
68ab01b2f2 radv/shader_info: remove unused output_usage_mask
Reduces the size of radv_shader_info from 1000 bytes to 872 bytes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37931>
2025-11-03 13:38:37 +01:00
Karmjit Mahil
9a6ab041fd tu: Use TU_BREADCRUMBS_ENABLED value
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The code was checking for the define to exists, which it always
does, and is set to 0, where it should instead have checked its
value.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38210>
2025-11-03 10:11:41 +00:00
David Rosca
502f7e85e5 radv/ci: Enable video tests on navi21 and navi31
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38184>
2025-11-03 08:39:59 +00:00
David Rosca
874e02003a radv/video: Only use write_memory for encode feedback with full support
write_memory is used after encoding every frame to mark the feedback
buffer as ready. Only use it when write_memory can work without PCIe
atomics support.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38184>
2025-11-03 08:39:59 +00:00
David Rosca
8e1d74bbb4 radv/video: Introduce two levels of write_memory support
Print warning when using write_memory with firmwares that require
PCIe atomics support.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38184>
2025-11-03 08:39:59 +00:00
Samuel Pitoiset
f91e5c9cb7 radv: use radv_get_shader_layout() more with ESO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38106>
2025-11-03 08:00:35 +00:00
Samuel Pitoiset
e5513826aa radv: fix creating linked graphics ESOs with a compute shader
It's valid to create shader objects with linked VS/FS and with a
compute shader.

This reworks radv_CreateShadersEXT() completely to allow this. Unlinked
shaders are created first, then linked shaders.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14193
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38106>
2025-11-03 08:00:35 +00:00
Valentine Burley
69ddb910e0 panfrost/ci: Enable G610 piglit job
Make `panfrost-g610-piglit:arm64` a pre-merge job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38182>
2025-11-03 07:24:17 +00:00
Valentine Burley
d11d83dee6 panfrost: Don't dump shader disassembly by default on CSF
Dumping disassembly when not explicitly requested to do so was probably
helpful during early CSF bringup. But the CSF code is relatively robust
now, so let's move this to only happen if PAN_DBG_TRACE is set, similar
to what we do in the JM backend.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38182>
2025-11-03 07:24:17 +00:00
Valentine Burley
74d9a90546 panfrost/ci: Drop redundant PAN_MESA_DEBUG variables
This is already set in `.panfrost-test`.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38182>
2025-11-03 07:24:17 +00:00
Janne Grunau
83b97379dc hk: Report the correct plane count in VkDrmFormatModifierProperties2?EXT
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Fixes import of planar formats like NV12 in gtk4. Allows
`gst-launch-1.0 v4l2src ! gtk4paintablesink` to use vulkan instead of
falling back to OpenGL.

Closes: #14217
Cc: mesa-stable
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38200>
2025-11-03 07:09:36 +00:00
spencer-lunarg
943d7b246e llvmpipe: Fix warning casting 32-bit int to 8-bit
Signed-off-by: spencer-lunarg <spencer@lunarg.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38207>
2025-11-02 22:42:19 -05:00
Marek Olšák
5d92c92ce5 Revert ABI breakage "amd: Add user queue HQD count to hw_ip info"
Some checks are pending
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This reverts commit 56d758d321.

It broke ABI between Mesa and libdrm, causing crashes due to stack smashing.

See: https://gitlab.freedesktop.org/mesa/libdrm/-/issues/121#note_3172362

Fixes: 56d758d321
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38203>
2025-11-02 02:54:59 +00:00
Marek Olšák
2f6b4803ab nir/validate: expand IO intrinsic validation with nir_io_semantics
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There are many workarounds.

v2: add more validation

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38113>
2025-11-02 02:21:46 +00:00