Commit graph

66318 commits

Author SHA1 Message Date
Job Noorman
f448cf90c8 zink/ci: add a618 flake
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Connor Abbott
de1d36d054 ci: Uprev VK-CTS to 1.3.9.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29766>
2024-08-15 09:01:26 +00:00
Connor Abbott
bc1521e601 ci: Move two failing loader-related tests to all-skips.txt
There's no value testing these tests in CI until the loader is upgraded,
so don't force every driver to add them to their fails list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29766>
2024-08-15 09:01:26 +00:00
Pavel Ondračka
a1a06f386e r300: fix RGB10_A2 CONSTANT_COLOR blending
Just reverse the color order the same way we do for RGBA8.

Fixes: 910bac63df
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30656>
2024-08-15 07:02:44 +00:00
David Rosca
4b60918138 radeonsi: Don't allow DCC for encode in is_video_target_buffer_supported
This accidentally allowed DCC with format conversion, which is not supported.
Also disable EFC with VCN5 for now.

Fixes: 40c3a53fec ("radeonsi: Implement is_video_target_buffer_supported")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30562>
2024-08-15 06:26:16 +00:00
David Rosca
79ce0e3b2f frontends/va: Fix use after free with EFC
This happens when the source surface is destroyed before being used
in encoding operation. It also needs to disable EFC in this case.

Fixes: a7469a9ffd ("frontends/va: Rework EFC logic")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11653
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30562>
2024-08-15 06:26:16 +00:00
Karol Herbst
5d0c870c00 rusticl/mem: do not check against image base alignment for 1Dbuffer images
The CL cap in question is only valid for 2D images created from buffer.

Fixes: 20c90fed5a ("rusticl: added")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30655>
2024-08-14 15:33:01 +00:00
David Rosca
214b6c3040 radeonsi/vcn: Only insert headers when requested for H264/5
Currently sequence headers (VPS, SPS, PPS) are always inserted
on each IDR frame and AUD is inserted on every frame, but this
should be decided by application what headers it wants.
AUD is optional and is almost never needed, in some cases sequence
headers also are not needed each IDR frame and currently this only
wastes bits.
With FFmpeg/GStreamer this changes AUD to not be inserted by default,
there is no change to sequence headers as those are already requested
to be inserted on each IDR.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:03 +00:00
David Rosca
c9ccce5271 frontends/omx: Request SPS PPS for IDR pictures
Also request AUD every frame to match old behavior.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:03 +00:00
David Rosca
31f6fe1356 frontends/va: Keep track if VPS/SPS/PPS/AUD was sent
FFmpeg sends AUD as part of VA_ENC_PACKED_HEADER_SEQUENCE and
VA_ENC_PACKED_HEADER_SLICE.
GStreamer sends it separately as VA_ENC_PACKED_HEADER_RAW_DATA.

It's now also needed to keep track what packed headers were enabled
to include VPS/SPS/PPS with VAEncSequenceParameterBuffer when sequence
packed headers are disabled.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:02 +00:00
David Rosca
ba1bc7c495 frontends/va: Don't check header type for packed header buffers
Applications should not send types that were not enabled when creating
config and even if they do it will not cause any unexpected issues.
Remove the checks as it is another place that would need to be
updated when adding support for new packed header types.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:02 +00:00
David Rosca
f8dcf15ed2 gallium: Add header_flags to pipe_h2645_enc_picture_desc
Indicates what headers should be inserted.
Move pipe_h265_enc_picture_desc metadata_flags into header_flags

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30585>
2024-08-14 13:26:02 +00:00
Antonio Ospite
2d2bc5b307 android: simplify building libgallium_dri on Android
The versioned libgallium library can be confusing on Android, and it is
probably not even needed there, so simplify the build on Android by
always build the unversioned `libgallium_dri.so` overriding the
`-Dunversion-libgallium=true` option added in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30579

Remove also all the bits that deal with the versioned library which are
not needed anymore.

Fixes: 9568976c52 ("android: fix build in multiple ways")
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30641>
2024-08-14 09:11:44 +00:00
Lucas Stach
c90e2bccf7 etnaviv: properly set PIPE_CAP_GRAPHICS
Only advertise graphics capabilities if the GPU isn't compute only.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30606>
2024-08-14 08:35:36 +00:00
Rob Clark
a5b103e4c1 freedreno/a6xx: Cleanup setup_slices()
We don't need to runtime dispatch btwn a6xx and a7xx versions of
setup_lrz().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30649>
2024-08-14 02:19:55 +00:00
Rob Clark
a127a78548 freedreno: Re-enable LRZ for a7xx
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30649>
2024-08-14 02:19:55 +00:00
Rob Clark
141466eb27 freedreno/a6xx: Fix LRZ
LRZ fastclear offset can be greater than 16b.

Fixes: b1937f76ff ("freedreno/a6xx: Allocate lrcfc when needed for direction tracking")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30649>
2024-08-14 02:19:55 +00:00
Christian Gmeiner
e05962a4e7 etnaviv: Drop halti from etna_specs
Use the one from etna_core_info instead.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00
Christian Gmeiner
6e0a28db2e etnaviv: Extend shader structs with etna_core_info
Prep step to drop halti from etna_specs.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00
Christian Gmeiner
6d673a3ac7 etnaviv: Switch etna_compiler_create(..) to etna_core_info
Prep step to drop halti from etna_specs.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00
Christian Gmeiner
ce2fc866ec etnaviv: Move halti determination to drm
The ideal place to store the halti value is in struct etna_core_info.
Let's put it there and the determination of it into etna_gpu_new(..).
This makes it possible to reuse the halti level outside of gallium.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30394>
2024-08-13 22:15:22 +00:00
Mike Blumenkrantz
a7f64c6203 zink: fix partial update handling
* the damage region was not being used correctly (this is a normal rect)
* use_damage was never unset at frame boundary
* original renderArea was never re-set

Fixes: 3d38c9597f ("zink: hook up KHR_partial_update")

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30625>
2024-08-13 15:26:27 +00:00
Alyssa Rosenzweig
fd63356268 r300: switch to derivative intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30572>
2024-08-13 12:45:12 +00:00
Alyssa Rosenzweig
772e6d61b9 ntt: switch to derivative intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30572>
2024-08-13 12:45:12 +00:00
Pavel Ondračka
9966365fe0 ttn: switch to derivative intrinsics
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30572>
2024-08-13 12:45:12 +00:00
Iago Toral Quiroga
ad9ff707ce broadcom: drop backend implementation of nir_op_ufind_msb
We can have NIR do this for us now that we have uclz.

Suggested by Georg Lehmann.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30614>
2024-08-13 13:16:18 +02:00
Iago Toral Quiroga
35a10f5d5a broadcom: implement nir_op_uclz
This enables some algebraic optimizations.

No changes in shader-db, but it does cause some CTS tests to
produce less instructions.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30614>
2024-08-13 13:16:11 +02:00
Karol Herbst
7935623126 rusticl/kernel: simplify adding internal kernel args
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
d72cc037f2 rusticl/kernel: move CompiledKernelArg decleration above the impl block
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
24ea5a756c rusticl/kernel: add KernelArgType::is_opaque
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
d26d17bbaf rusticl/kernel: big kernel arg rework
The main change here is that instead of having two vectors for API and
internal arguments, there is just one per built kernel.

Some of the API level information is still in its own structure and
referenced by the above mentioned merged vector, but with this change each
device and also each kernel variant can have arguments placed at different
locations or even have a different set of arguments.

This rework will be necessary to add kernel variants in a non messy way.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
0b98e47d83 rusticl/kernel: move serialization code of KernelArgType
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
2645ba6942 rusticl/kernel: rename InternalKernelArgType to CompiledKernelArgType
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
3cc3ba2e8f rusticl/kernel: make KernelArg::offset and KernelArg::binding proper u32 values
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
b142bee150 rusticl/kernel: make CompiledKernelArg::offset a u32
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
e69ad5ff69 rusticl/kernel: remove CompiledKernelArg::size
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
3ddc2b536d rusticl/kernel: rename InternalKernelArg to CompiledKernelArg
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
16a2808299 rusticl/kernel: move kernel size into Constant arg type
It's the only argument type with an actual size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Karol Herbst
0cfcd2ff83 rusticl/memory: fix sampler argument size check
Not entirely sure why this hasn't caused any problems...

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30602>
2024-08-13 10:07:03 +00:00
Pavel Ondračka
1cad339409 r300: bias presubtract fix
We need to double check that the source is indeed constant before
looking at the constant type.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Fixes: 0508db9155
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29893>
2024-08-13 08:52:45 +00:00
Alyssa Rosenzweig
6405153a07 asahi: switch to block based compute blitter
This fixes the compute blitter with compression in the general case, and then
flips the switch since the compute blitter is faster / less buggy than the
traditional path.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 19:11:23 -04:00
Alyssa Rosenzweig
94cf7de88f asahi: pack imageblock words for compute
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 19:11:23 -04:00
Alyssa Rosenzweig
f4cca9d600 asahi: introduce agx_va data structure
prep for sparse.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:45:57 -04:00
Alyssa Rosenzweig
5c7dd392d3 asahi: always pass align parameter for BOs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:36:26 -04:00
Alyssa Rosenzweig
8dae4aacb4 asahi: stop fixing up USC addresses
use the real VA space.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:36:26 -04:00
Alyssa Rosenzweig
df725d4f64 asahi: remove agx_bo::dev
track at call sites.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:36:26 -04:00
Alyssa Rosenzweig
3d18f14328 hk,asahi: pass through soft fault to VBO lower
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:36:26 -04:00
Alyssa Rosenzweig
f0cd599913 agx: factor out agx_device_key
we will have other device-dependent key members soon.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:36:26 -04:00
Alyssa Rosenzweig
d654cc55b5 asahi: fix warning
../src/gallium/drivers/asahi/agx_uniforms.c:60:10: warning: taking address of packed member of ‘struct agx_draw_uniforms’ may result in an unaligned pointer value [-Waddress-of-packed-member]
   60 |          &batch->uniforms.attrib_base[i]);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:36:26 -04:00
Asahi Lina
54cec6ae30 asahi: Do not sync against our own queue
We previously introduced cross-context sync points to make ordering work
with multiple queues. Unfortunately, that also adds a CPU round trip in
the kernel when a single context flushes and then keeps submitting,
since it introduces a sync against itself. That's pointless.

To fix this without introducing races, on flush, we check the previous sync
point. If it's foreign, we record it, and we also keep track of our last
local sync point. Then, when waiting, if we're about to wait on our last
flush sync point from our own queue, we instead wait for the foreign
one. A foreign sync after that will cause the equality check to fail and
future submits from this queue to sync against the most up to date
point, and the next flush will then record it as the last known foreign
sync point for this queue (and continue flushing against it until
another foreign queue flushes again).

Fixes glmark2 perf regression (particularly with `build` and similar
high-FPS tests).

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30633>
2024-08-12 18:36:26 -04:00