Commit graph

165473 commits

Author SHA1 Message Date
Konstantin Seurer
c7fc30421c radv: Advertise rt pipelines for Control (DX12)
The game has been working on radv since basically forever.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20729>
2023-01-18 09:58:24 +00:00
Erik Faye-Lund
0429f11dfb zink: remove depth_clip_control_missing workaround
The ANV bug this was meant to represent has been long fixed, and the
workaround has just been a proxy for EXT_depth_clip_control for a while
now.

Let's simplify things a bit, by removing this flag.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20740>
2023-01-18 09:31:06 +00:00
Erik Faye-Lund
c12fed1804 zink: fix depth-clip disable cap
We use EXT_depth_clip_enable for this, not EXT_depth_clip_control, which
is what depth_clip_control_missing is a proxy for.

Fixes: 721f33cd0f ("zink: fix return for PIPE_CAP_DEPTH_CLIP_DISABLE")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20740>
2023-01-18 09:31:06 +00:00
Erik Faye-Lund
09a87d2171 zink: whitespace fixup
This just cleans up some indentation, no functional changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20745>
2023-01-18 09:11:54 +00:00
Samuel Pitoiset
84241b1f75 ac/nir: clear unused components before storing XFB outputs to LDS
Shader variables don't always exactly match intrinsics and they might
contain unused slots.

Fixes a bunch of regressions with RADV_PERFTEST=ngg_streamout on RDNA2,
and also fixes RDNA3 NGG streamout.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8099
Fixes: cd22bf90e7 ("ac/nir/ngg: refine nogs outputs handling")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20735>
2023-01-18 07:38:44 +00:00
Mike Blumenkrantz
e39bf3e6aa zink: skip implicit feedback loop layout changes if feedback loop not present
if a resource is bound as both a framebuffer attachment and a sampler but
isn't actually used as a sampler, it's just a framebuffer attachment, and it
should retain its layout as a framebuffer attachment without any barriers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20674>
2023-01-18 07:20:58 +00:00
Mike Blumenkrantz
9ba0657903 zink: make implicit feedback loop application stricter
in many cases, a texture may be bound as both a framebuffer attachment
and a samplerview without the latter actually being used by a shader

this avoids unnecessary feedback loop tagging, which should improve
perf and avoid spurious warning messages on drivers that don't support
the feedback loop ext

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20674>
2023-01-18 07:20:58 +00:00
Mike Blumenkrantz
230a554719 zink: outdent code in add_implicit_color_feedback_loop()
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20674>
2023-01-18 07:20:58 +00:00
Mike Blumenkrantz
487e5cc781 zink: set textures_used in analyze_io
this is otherwise not usable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20674>
2023-01-18 07:20:58 +00:00
Mike Blumenkrantz
9a9c17cd49 zink: break out implicit feedback loop detection into separate function
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20674>
2023-01-18 07:20:58 +00:00
Rob Clark
6f91a5ab07 freedreno: Restore GL_VENDOR string
We cannot change this, as it has already been communicated to app
partners.  Also this breaks chrome's GPU quirk matching (which in some
cases is non-gpu-related, but when all you have is a hammer, everything
looks like a nail).

Fixes: 9c1fbc076a ("Return 'Mesa' for GL_VENDOR for community drivers")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20757>
2023-01-18 07:00:48 +00:00
Dave Airlie
589d4ff0cb vulkan/format: add a 10-bit video format
This adds support to the generic vulkan format code for
VK_FORMAT_G10X6_B10X6R10X6_2PLANE_420_UNORM_3PACK16
which is used for 10-bit H265.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
(Updated version acked by Lynne on irc)

v2: disable these for freedreno

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20389>
2023-01-18 06:36:27 +00:00
Dave Airlie
41dbeca4c2 vulkan/video: add common h264/h265 parameter set management code.
The video session and video session parameters objects can have a common
base class the drivers can inherit from if needed.

This creates code to parse the h264/h265 parameter sets into common
structs.

v2: add h265 VPS, add a macro for FIND/ADD generations, changes the API
to make generation easier.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20389>
2023-01-18 06:36:27 +00:00
Rob Clark
0c30e0fa00 freedreno/a6xx: Expose SSBO/image for all shader stages
Now that we've removed the limitation of a single bindful IBO state, we
can expose IBO support on all shader stages.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
a93d3f1498 freedreno/a6xx: Move tex state building
Now that it is only called from fd6_texture, move it there where it more
rightly belongs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
a16c99a9a5 freedreno/a6xx: Move compute to tex state group
This lets compute shaders hit the shader state cache as well, and
unifies 3d and cs state emit allowing for more code sharing.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
b17ad0657f freedreno/a6xx: Remove tex fb_read state
Now that fb_read is using a bindless descriptor slot, we can remove the
dependency of the TEX state on the PROG state.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
f6b6400254 freedreno/a6xx: Removing munging of tex state for IBO
Now that we use bindless descriptors for SSBO/image, lowering to isam
means we can use the existing descriptor.  Avoiding the need to smash in
extra bindful sampler state.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
549a8d206a freedreno/a6xx: Remove bindfull IBO state
Now that it is unused.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
ce1e73f441 freedreno/a6xx: Switch over to bindless IBO
This allows support for SSBOs/images in all shader stages.  And also,
unlike the bindful IBO state, does not introduce a dependency on the
program state.  With bindless descriptors, SSBO and image fetch lowered
to isam can re-use the same descriptor.  This will let us remove the
TEX state dependency on PROG state (in a following cleanup commit).

Note, this does not yet switch the pipe caps to reflect that we can
support SSBOs/images in other shader stages.. because ir3 still tells us
nibo>0 even though we are using bindless and that triggers an assert in
the build_ibo() path.  Probably we want ir3 to be more clever.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
e51975142c freedreno/a6xx: Add bindless state
This will be used when we switch over to lowering image/SSBO to
bindless.

Note that it also starts using CP_SET_DRAW_STATE in the compute path.
Subsequent cleanup will switch texture and eventually other state over
as well (which will make more sense when we get more clever than
emitting all state for every compute grid, but for now simplifies
re-using the same code between 3d and compute).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
101700b150 freedreno/a6xx: Pre-bake IBO descriptor sets
Pre-bake IBO descriptor sets at the time that images/SSBOs are bound,
and re-use the pre-baked descriptors at draw time when we emit state.

This starts putting in place the state tracking we'll use when switching
over to bindless IBO state, without yet changing the shaders (lowering
to bindless) or changing the actual state emitted (other than switching
to use the storage descriptor for image reads via isam, like tu does).

Note that this even pre-bakes the iova into the descriptor, rather than
relying on OUT_RELOC() to do the bo tracking, so we need to manually
attach the bo to the ring.  But we already require FD_BO_NO_HARDPIN for
a6xx.  This makes the state emit a straight memcpy, and will simplify
things when it comes to generating the bindless descriptor set (which
due to the desc_size field in the low bits of the BINDLESS_BASE regs
would be awkward to construct as a ring rather than a bo).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
a45d111c18 freedreno/ir3: Add descriptor set lowering
Add support to lower IBO (image/SSBO) and fb-read to use bindless
descriptors.  This will be used by a6xx to avoid having to merge image
and SSBO state into a single compact IBO descriptor, and also simplify
enabling image and SSBO support for additional shader stages (since each
stage can use it's own descriptor set).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
066ff5c759 freedreno: Track image/SSBO usage for all stages
Once a6xx enables image/SSBO for all shader stages, we have to care
about more than just frag shader in the 3d path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
165de87f8e freedreno/ir3: Let driver specify fb-read descriptor
Let the driver control where the shader should look for fb-read
descriptor.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Rob Clark
4982adb4cf freedreno/ir3: Stop copying options
Just copy the entire ir3_compiler_options into ir3_compiler, to make it
easier to add new options.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
2023-01-18 06:10:10 +00:00
Qiang Yu
db2497f205 radeonsi: update nir xfb info after medium io lowering
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
49cfbe1fed nir/xfb_info: nir_gather_xfb_info_from_intrinsics update nir xfb_info
Use this function to update nir_shader->xfb_info.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
b6c172f26c gallium/aux: remove nir_helpers
Not used by anyone.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
1590817977 radeonsi: move gfx10_ngg_export_vertex to si_shader_llvm.c
It's now also used by non-ngg pipeline and older GPUs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
1475339543 radeonsi: replace llvm legacy gs code with nir lowering
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
6219374c4e radeonsi: remove llvm gs copy shader generate
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
e007c7fa6f radeonsi: replace llvm gs copy shader generation with nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
246630ac98 radeonsi: build legacy gs output info when shader compile
To be used by both legacy gs lowering and gs copy shader
generation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
2b0566f672 radeonsi: add nir implementation of gs copy shader generation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:14 +00:00
Qiang Yu
89aa75f81c radeonsi: use ac_nir_lower_legacy_vs to replace si_llvm_vs_build_end
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:13 +00:00
Qiang Yu
acde71c015 radeonsi: use nir_print_xfb_info to replace si_dump_streamout
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:13 +00:00
Qiang Yu
def3f700bc radeonsi: lower nir streamout intrinsics in abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:13 +00:00
Qiang Yu
743fbc4bb0 radeonsi: implement nir_load_ring_gs2vs_offset_amd
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:13 +00:00
Qiang Yu
16cf743f2d radeonsi: implement nir_load_ring_gsvs_amd
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19489>
2023-01-18 05:30:13 +00:00
Emma Anholt
8aff228127 ci: Enable building the testing drivers with perfetto.
We've talked about being able to capture perfetto traces from CI jobs for
a while, and this would be a step toward that.  Mostly it's that we
occasionally break the perfetto build, so let's make sure we don't do
that.

Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20660>
2023-01-18 05:04:46 +00:00
Emma Anholt
64455dc32b freedreno/pps: Fix a signed/unsigned complaint.
../src/freedreno/ds/fd_pps_driver.cc:656:44: error: comparison of integer expressions of different signedness: '__gnu_cxx::__alloc_traits<std::allocator<int>, int>::value_type' {aka 'int'} and 'const unsigned int' [-Werror=sign-compare]
  656 |             assert(d->assigned_counters[i] < g->num_counters);
cc1plus: all warnings being treated as errors

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20660>
2023-01-18 05:04:46 +00:00
Emma Anholt
302858c48c ci/freedreno: Add glx-swap-event-async as a flake.
It's only happened a few times in the last year (used to be more popular),
but it just took out a merge.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20660>
2023-01-18 05:04:46 +00:00
Emma Anholt
327f736627 freedreno: Skip CPU/GPU timestamp sync when not supported.
Fixes immediate segfaults in perfetto-enabled builds on pre-a6xx.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20660>
2023-01-18 05:04:46 +00:00
Emma Anholt
79bbfb3168 ci/zink: Add more blit conversion xfails for a618.
Popular cases in this group recently:

      1 dEQP-GLES3.functional.fbo.blit.conversion.r16ui_to_r16ui
      1 dEQP-GLES3.functional.fbo.blit.conversion.r16ui_to_rgb10_a2ui
      1 dEQP-GLES3.functional.fbo.blit.conversion.rgb5_a1_to_rgb5_a1
      3 dEQP-GLES3.functional.fbo.blit.conversion.rgba4_to_r32f
      4 dEQP-GLES3.functional.fbo.blit.conversion.rgb565_to_rgba8
      5 dEQP-GLES3.functional.fbo.blit.conversion.rgba4_to_rg16f

There's pretty clearly something common with blitting from 16-bit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20759>
2023-01-18 04:43:59 +00:00
Emma Anholt
c4c94e8aed ci/iris: Generalize the 8888_pbuffer EGL known flakes and share with GLK.
It seems to be this whole group of tests, on both boards that run EGL
tests by default (aml-y is manual-only).  Make them a regex until someone
comes up with a fix.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20759>
2023-01-18 04:43:59 +00:00
Emma Anholt
6dc90009a5 ci/iris: Add known flakes for skqp.
We've had a lot more jobs run since I landed the CI, and these seem to be
the common flakes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20759>
2023-01-18 04:43:59 +00:00
Emma Anholt
c34b539e17 ci/llvmpipe: Drop dEQP-EGL.functional.sharing.*.link.7 flakes.
These appear to have been resolved by !20458 -- went from typically
multiple per day to none since then.  The link.19 fails to seem to still
happen, though.

Closes: #7759
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20759>
2023-01-18 04:43:59 +00:00
Jason Ekstrand
d292cb82b8 gallium,util: Pull u_indices and u_primconvert back into gallium
This was moved in !13741 but doing so created a link-time dependency
between util and gallium which causes problems for Vulkan drivers.
Meanwhile, having mesa/main depend on gallium is fine now that we don't
have any classic drivers.  It's a bit circular but should be harmless.

Fixes: 97ba2f2fd4 ("move util/indices to core util")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8098
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20734>
2023-01-18 03:53:30 +00:00
Ikshwaku Chauhan
fe3b467eb9 radeonsi: Fix distortion for yuv422 format for GFX10.
For yuv422 format camera show blur output for GFX10.

Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Marek Olšák marek.olsak@amd.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20610>
2023-01-18 01:44:15 +00:00