freedreno/a6xx: Remove bindfull IBO state

Now that it is unused.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20687>
This commit is contained in:
Rob Clark 2023-01-07 12:30:49 -08:00 committed by Marge Bot
parent ce1e73f441
commit 549a8d206a
5 changed files with 1 additions and 111 deletions

View file

@ -167,8 +167,7 @@ setup_state_map(struct fd_context *ctx)
fd_context_add_map(ctx, FD_DIRTY_BLEND | FD_DIRTY_SAMPLE_MASK,
BIT(FD6_GROUP_BLEND));
fd_context_add_map(ctx, FD_DIRTY_BLEND_COLOR, BIT(FD6_GROUP_BLEND_COLOR));
fd_context_add_map(ctx, FD_DIRTY_SSBO | FD_DIRTY_IMAGE | FD_DIRTY_PROG,
BIT(FD6_GROUP_IBO) | BIT(FD6_GROUP_FS_TEX));
fd_context_add_map(ctx, FD_DIRTY_PROG, BIT(FD6_GROUP_FS_TEX));
fd_context_add_map(ctx, FD_DIRTY_PROG,
BIT(FD6_GROUP_VS_TEX) | BIT(FD6_GROUP_HS_TEX) |
BIT(FD6_GROUP_DS_TEX) | BIT(FD6_GROUP_GS_TEX) |

View file

@ -583,51 +583,6 @@ build_blend_color(struct fd6_emit *emit) assert_dt
return ring;
}
static struct fd_ringbuffer *
build_ibo(struct fd6_emit *emit) assert_dt
{
struct fd_context *ctx = emit->ctx;
if (emit->hs) {
assert(ir3_shader_nibo(emit->hs) == 0);
assert(ir3_shader_nibo(emit->ds) == 0);
}
if (emit->gs) {
assert(ir3_shader_nibo(emit->gs) == 0);
}
unsigned nibo = ir3_shader_nibo(emit->fs);
if (nibo == 0)
return NULL;
struct fd_ringbuffer *ibo_state =
fd6_build_ibo_state(ctx, emit->fs, PIPE_SHADER_FRAGMENT);
struct fd_ringbuffer *ring = fd_submit_new_ringbuffer(
ctx->batch->submit, 0x100, FD_RINGBUFFER_STREAMING);
OUT_PKT7(ring, CP_LOAD_STATE6, 3);
OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) |
CP_LOAD_STATE6_0_STATE_TYPE(ST6_SHADER) |
CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) |
CP_LOAD_STATE6_0_STATE_BLOCK(SB6_IBO) |
CP_LOAD_STATE6_0_NUM_UNIT(nibo));
OUT_RB(ring, ibo_state);
OUT_PKT4(ring, REG_A6XX_SP_IBO, 2);
OUT_RB(ring, ibo_state);
/* TODO if we used CP_SET_DRAW_STATE for compute shaders, we could
* de-duplicate this from program->config_stateobj
*/
OUT_PKT4(ring, REG_A6XX_SP_IBO_COUNT, 1);
OUT_RING(ring, nibo);
fd_ringbuffer_del(ibo_state);
return ring;
}
static void
fd6_emit_streamout(struct fd_ringbuffer *ring, struct fd6_emit *emit) assert_dt
{
@ -860,10 +815,6 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
state = build_blend_color(emit);
fd6_state_take_group(&emit->state, state, FD6_GROUP_BLEND_COLOR);
break;
case FD6_GROUP_IBO:
state = build_ibo(emit);
fd6_state_take_group(&emit->state, state, FD6_GROUP_IBO);
break;
case FD6_GROUP_VS_BINDLESS:
state = fd6_build_bindless_state(ctx, PIPE_SHADER_VERTEX, false);
fd6_state_take_group(&emit->state, state, FD6_GROUP_VS_BINDLESS);
@ -960,27 +911,6 @@ fd6_emit_cs_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_RING(ring, 0);
}
if (dirty & (FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE)) {
struct fd_ringbuffer *state =
fd6_build_ibo_state(ctx, cp, PIPE_SHADER_COMPUTE);
OUT_PKT7(ring, CP_LOAD_STATE6_FRAG, 3);
OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) |
CP_LOAD_STATE6_0_STATE_TYPE(ST6_IBO) |
CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) |
CP_LOAD_STATE6_0_STATE_BLOCK(SB6_CS_SHADER) |
CP_LOAD_STATE6_0_NUM_UNIT(ir3_shader_nibo(cp)));
OUT_RB(ring, state);
OUT_PKT4(ring, REG_A6XX_SP_CS_IBO, 2);
OUT_RB(ring, state);
OUT_PKT4(ring, REG_A6XX_SP_CS_IBO_COUNT, 1);
OUT_RING(ring, ir3_shader_nibo(cp));
fd_ringbuffer_del(state);
}
u_foreach_bit (b, ctx->gen_dirty) {
enum fd6_state_id group = b;

View file

@ -65,7 +65,6 @@ enum fd6_state_id {
FD6_GROUP_SCISSOR,
FD6_GROUP_BLEND_COLOR,
FD6_GROUP_SO,
FD6_GROUP_IBO,
FD6_GROUP_VS_BINDLESS,
FD6_GROUP_HS_BINDLESS,
FD6_GROUP_DS_BINDLESS,

View file

@ -202,40 +202,6 @@ validate_buffer_descriptor(struct fd_context *ctx, struct fd6_descriptor_set *se
set->seqno[slot] = rsc->seqno;
}
/* Build combined image/SSBO "IBO" state, returns ownership of state reference */
struct fd_ringbuffer *
fd6_build_ibo_state(struct fd_context *ctx, const struct ir3_shader_variant *v,
enum pipe_shader_type shader)
{
struct fd_shaderbuf_stateobj *bufso = &ctx->shaderbuf[shader];
struct fd_shaderimg_stateobj *imgso = &ctx->shaderimg[shader];
struct fd6_descriptor_set *set = descriptor_set(ctx, shader);
struct fd_ringbuffer *state = fd_submit_new_ringbuffer(
ctx->batch->submit,
ir3_shader_nibo(v) * FDL6_TEX_CONST_DWORDS * 4,
FD_RINGBUFFER_STREAMING);
assert(shader == PIPE_SHADER_COMPUTE || shader == PIPE_SHADER_FRAGMENT);
for (unsigned i = 0; i < v->num_ssbos; i++) {
unsigned slot = i + IR3_BINDLESS_SSBO_OFFSET;
validate_buffer_descriptor(ctx, set, slot, &bufso->sb[i]);
fd6_emit_single_plane_descriptor(state, bufso->sb[i].buffer,
set->descriptor[slot]);
}
for (unsigned i = v->num_ssbos; i < v->num_ibos; i++) {
unsigned n = i - v->num_ssbos;
unsigned slot = n + IR3_BINDLESS_IMAGE_OFFSET;
validate_image_descriptor(ctx, set, slot, &imgso->si[n]);
fd6_emit_single_plane_descriptor(state, imgso->si[n].resource,
set->descriptor[slot]);
}
return state;
}
/* Build bindless descriptor state, returns ownership of state reference */
struct fd_ringbuffer *
fd6_build_bindless_state(struct fd_context *ctx, enum pipe_shader_type shader,

View file

@ -35,10 +35,6 @@ void fd6_emit_image_tex(struct fd_context *ctx, struct fd_ringbuffer *ring,
void fd6_emit_ssbo_tex(struct fd_context *ctx, struct fd_ringbuffer *ring,
const struct pipe_shader_buffer *pbuf) assert_dt;
struct ir3_shader_variant;
struct fd_ringbuffer *
fd6_build_ibo_state(struct fd_context *ctx, const struct ir3_shader_variant *v,
enum pipe_shader_type shader) assert_dt;
struct fd_ringbuffer *
fd6_build_bindless_state(struct fd_context *ctx, enum pipe_shader_type shader,
bool append_fb_read) assert_dt;