Commit graph

7483 commits

Author SHA1 Message Date
Dave Airlie
ca7a2e508d radv/winsys: handle encoder queue padding/submits.
The encoder queue doesn't like padding at all, don't pad in the sysmem
paths for encoder queue.

The encoder queue will be using on gfx11 for decoding.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
2fdf75dadf radv: set a video decode ip block in physical device.
This makes it easier to add navi 3x

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Dave Airlie
d8262e26a2 radv/video: add missing gfx family
This is compatible with rdna2 but was just missing.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21980>
2023-04-27 02:00:03 +00:00
Samuel Pitoiset
3f14fd8578 radv: reserve command buffer index for SQTT
These indexes are used to match command buffers with queue events.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22670>
2023-04-26 13:57:39 +00:00
Qiang Yu
5c287290d8 aco,radv: remove unused aco compile options
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
a4b60295a7 aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv
The side effect is removing the aco/llvm backend bc optimization code
and linear/persp_centroid variable.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
bfcf03872e radv: implement nir_load_barycentric_optimize_amd
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Qiang Yu
290c3d360e aco,radv: lower outputs to exports when nir for monolithic ps
Remove the compiler backend code for outputs to exports.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>
2023-04-26 03:27:26 +00:00
Daniel Schürmann
1080ff3971 radv/rt: remove merged VkRayTracingShaderGroupCreateInfoKHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Daniel Schürmann
b72c50a885 radv/rt: replace uses of pGroups with radv_ray_tracing_group
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Friedrich Vock
c809c05f4f radv: Hash pipeline libraries separately
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Daniel Schürmann
a98b44cd34 radv/rt: add shader stage indices to radv_ray_tracing_group
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Daniel Schürmann
1a0ae06091 radv/rt: rename radv_ray_tracing_module -> radv_ray_tracing_group
This name better reflects the purpose and content of this struct.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22686>
2023-04-26 02:48:29 +00:00
Daniel Schürmann
2795cf7422 radv/rt: properly destroy radv_ray_tracing_lib_pipeline on error
Also return the correct error code.

Fixes: 4dafb69d61 ('radv/rt: defer library_pipeline allocation')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22684>
2023-04-25 23:52:49 +00:00
Friedrich Vock
b73e2df47a radv: Don't leak the RT prolog binary
Fixes: 063d0c90 ("radv: Combine all the parts together with a main loop for an RT pipeline.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22535>
2023-04-25 19:32:42 +00:00
Friedrich Vock
23c2dbd6ba radv/rt: Plug some memory leaks during shader creation
nir_inline_function actually clones instructions instead of moving them.
Free the shaders explicitly after inserting them instead.

Fixes: 207ce6d658 ("radv: Add helper to inline shaders into the main shader.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22535>
2023-04-25 19:32:42 +00:00
Friedrich Vock
7cad28571b radv/rmv: Fix import memory
For some import memory, it is valid to specify zero size.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22532>
2023-04-25 16:07:00 +00:00
Friedrich Vock
fd389ade5c radv/rmv: Fix creating RT pipelines
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22532>
2023-04-25 16:06:59 +00:00
Samuel Pitoiset
bdc4e3a5a6 radv: do not overallocate the CS array during submissions
Preambles/postambles are no longer added to the CS array.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22653>
2023-04-24 17:09:28 +00:00
André Almeida
41a3656149 radv: Search for guilty contexts at radv_check_status
When a GPU hung happens, all contexts are notified. They will receive
INNOCENT_CONTEXT if they are not the context that triggered the reset,
or GUILTY_CONTEXT otherwise.

At radv_check_status(), we return on the first context that was notified
as [GUILTY, INNOCENT]_CONTEXT, without further checks. This can make an
app think that it's innocent if the guilty context is not the first one
on the list of hw_ctx to be checked.

Check every context for a guilty one before returning CONTEXT_INNOCENT.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: André Almeida <andrealmeid@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22648>
2023-04-24 16:45:40 +00:00
Samuel Pitoiset
16d0b868c6 radv: add the perf counters BO to the preambles BO list
If the submission isn't chained for any reasons, we might end by
submitting the performance counter preambles without a command
buffer that added this BO to its list.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22627>
2023-04-24 06:45:23 +00:00
Samuel Pitoiset
84d8ea6e2b radv/amdgpu: fix adding continue preambles and postambles BOs to the list
Previously, continue preambles and postambles were added directly to
the CS array which means all BOs were correctly added to the BO list,
and this has been broken recently. IB BOs need to be added to the list.

When a BO isn't added to the list as part of a submission, it might
randomly VM faults.

This fixes VM faults and random GPU hangs on NAVI21 in Mesa CI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8849
Fixes: 41a9bced31 ("radv: Fill continue preambles and postambles properly.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22625>
2023-04-21 18:47:14 +00:00
Samuel Pitoiset
74ab940156 radv: update binning settings to work around GPU hangs
Ported from RadeonSI, but it seems PAL always use 1 for both
parameters as well.

This should fix random GPU hangs with small chips (eg. NAVI24, GFX1103),
though all chips might have been affected.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8046
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8597
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8683
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22528>
2023-04-20 18:12:52 +00:00
André Almeida
d99211b22c radv: debug: Update decode ring umr command
The old ring decoder command is deprecated since umr release 1.0.4 and
was effectively removed at 1.0.7. Update the command to use the new
decode flag.

Signed-off-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22576>
2023-04-20 17:26:43 +00:00
Samuel Pitoiset
6bc2dce228 radv: use gfx_level in radv_flush_occlusion_query_state()
Cleanup.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Samuel Pitoiset
fbab8df43f radv: emit PIXEL_PIPE_STAT_CONTROL in the gfx preamble for GFX11
This is more optimal than emitting for every BeginOcclusionQuery().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Samuel Pitoiset
c1d32880f7 radv: track DB_COUNT_CONTROL changes to avoid context rolls
This can be really noticeable for the BeginQuery/Draw/EndQuery pattern.
It seems to improve a depth-only pass by +35% in one upcoming game
because this removes a bunch of context rolls.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Samuel Pitoiset
02443d752e radv: delay enabling/disabling occlusion queries at draw time
Most applications have a sequence like BeginQuery/Draw/EndQuery which
can be optimized by delaying DB_COUNT_CONTROL at draw time instead of
enabling/disabling for every draw.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
2023-04-20 16:25:09 +00:00
Samuel Pitoiset
d44651bfc3 radv: wait for occlusion queries in the resolve query shader
This is really noticeable for games that resolve a bunch of occlusion
queries (in this case 4096) because it seems that emitting 4096
WAIT_REG_MEM packets can stall more than expected. Fixes this by
waiting for queries in the resolve query shader.

This improves performance of an unreleased game by +~10% (71->78 FPS).
RADV should now be really close to Windows performance for that title.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22579>
2023-04-20 14:11:26 +00:00
Samuel Pitoiset
72a522fb36 radv: fix usage flag for 3D compressed 128 bpp images on GFX9
VK_FORMAT_FEATURE_2_COLOR_ATTACHMENT_BIT is equal to
VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT but we want COLOR_ATTACHMENT_BIT.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22540>
2023-04-20 08:20:50 +00:00
Samuel Pitoiset
8a2fab66de radv: do not allow 1D block-compressed images with (extended) storage on GFX6
For some reasons this seems broken only on GFX6. Note that PAL doesn't
allowed block-compressed with 1D on all GPUs.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22540>
2023-04-20 08:20:50 +00:00
Timur Kristóf
b32556b058 radv: Fix dword alignment in SDMA buffer copy.
Also add a comment that explains the dword aligned mode.

Note that the SDMA shader uploads are always dword aligned
so this commit doesn't fix any issues but just prepares this
function for more general use.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22551>
2023-04-20 00:46:01 +00:00
Daniel Schürmann
b288ec803c radv/rt: fix total stack size computation
Fixes: 2649a1f272 ('radv/rt: introduce and set rt_pipeline->stack_size ')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22526>
2023-04-19 12:26:53 +00:00
Timur Kristóf
acce5c3fe1 radv: Enable IB2 workaround on all indirect draws.
IB2 packets hang GFX6 when they contain any indirect draws,
not just the MULTI versions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Timur Kristóf
46a14390d8 radv: Remove IB2 workaround from mesh shader draws.
The GPUs which need the workaround do not support mesh shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Timur Kristóf
d16d9ef345 radv: Simplify IB2 workaround.
Move compute IB2 check to the winsys, because IB2 only works on
GFX queues and not any other queue types.

Then, simplify the workaround condition in the cmd buffer.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Qiang Yu
3ff9153a3b ac,radv: move ps arg compation to common place
To be shared with radeonsi when aco is used.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Tatsuyuki Ishi
3678c28d3d util: Call mesa_bytes_to_hex directly instead of disk_cache_format_hex_id.
The formatting is nothing specific about the disk cache.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22527>
2023-04-19 04:19:51 +00:00
Samuel Pitoiset
c221bfbd85 radv/amdgpu: remove legacy code for querying context status
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
2023-04-18 06:55:03 +00:00
Samuel Pitoiset
767a9324b9 radv/amdgpu: remove legacy code path for creating the BO list
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
2023-04-18 06:55:03 +00:00
Samuel Pitoiset
c920d676c0 radv: require DRM 3.27
Linux kernel 4.20+ is now required to use RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22521>
2023-04-18 06:55:03 +00:00
Samuel Pitoiset
0d7912d239 radv: disable fast-clears with CMASK for 128-bit formats
This isn't supported according to RadeonSI.

This fixes a piglit test with Zink that uses a R32G32B32A32_SINT format
with MSAA 8x. This is because DCC fast-clears with MSAA require to
clear CMASK too.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7313
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22462>
2023-04-17 06:19:34 +00:00
Samuel Pitoiset
3ad751f043 radv: tidy up dirtying RBPLUS state in radv_bind_dynamic_state()
To dirty driver specific states at the same place.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22472>
2023-04-14 17:49:23 +00:00
Samuel Pitoiset
ba71b142f8 radv: re-emit the guardband state when related PSO are bound
If one of the related states is static, the guardband state needs to be
re-emitted when a graphics pipeline is bound.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8828
Fixes: 40d8df7280 ("radv: emit the guardband state separately from the scissor state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22472>
2023-04-14 17:49:23 +00:00
Samuel Pitoiset
f11a4a09b0 radv: try to keep HTILE compressed for READ_ONLY_OPTIMAL layout
It should be handled like DEPTH_STENCIL_READ_ONLY_OPTIMAL.

This fixes an issue with VRS attachment because HTILE was considered
disabled for READ_ONLY_OPTIMAL but there is no reasons to disable it
as long as the image is only used as a depth/stencil attachment.

Otherwise, when HTILE is disabled, VRS rates are ignored.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8675
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22468>
2023-04-14 13:48:04 +00:00
Timur Kristóf
948a122f30 amd: Rename INDIRECT_BUFFER_CIK to just INDIRECT_BUFFER.
This packet is supported on GFX6 too, its name should relect that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:48 +00:00
Timur Kristóf
7ddac41f3f radv: Chain command buffers on GFX6 in radv_queue.
Also don't check whether chaining is enabled in radv_queue, the
winsys will take care of that anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:48 +00:00
Timur Kristóf
d6518fd357 radv: Use IB BOs (chaining) by default on GFX6.
GFX6 supports IB chaining since the PFP firmware version 20.
Note that the very first amdgpu firmware for GFX6 already had
version 29, so we can assume that all GPUs supported by RADV
have this feature.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00
Timur Kristóf
0e7244ce18 radv: Disallow IB2 on GFX6 when using draw_indirect_multi.
GFX6 has the same problem as GFX7 here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00
Timur Kristóf
add3b34c17 radv/amdgpu: Remove unnecessary assertions from chaining.
These used to guard against chaining on GFX6 and on HW IP types
that don't support chaining, but these things are now guarded
elsewhere and these assertions are no longer necessary.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22406>
2023-04-13 23:58:47 +00:00