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Author SHA1 Message Date
Marek Olšák
f22f117d1a amd: add meson variable idep_amd_generated_headers for all generated headers 
group all generated header under the same variable

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40084>
 2026-02-28 05:23:59 +00:00
Mike Blumenkrantz
b8ee6f3d30 radv: fix multiview fast clears 
this was only clearing layer0 because it was ignoring the viewmask

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40123>
 2026-02-27 15:07:01 +00:00
Samuel Pitoiset
5fa94dba34 radv: only enable DCC/HTILE if it's compressed with SDMA
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It's wrong to enable compression if it's not compressed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40101>
 2026-02-27 11:23:48 +00:00
Samuel Pitoiset
3869a6f967 ac/cmdbuf: only set DCC_WRITE_COMPRESS for DCC on SDMA 5+ 
Compressed HTILE writes aren't supported at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40101>
 2026-02-27 11:23:48 +00:00
Samuel Pitoiset
d583339e79 radv/meta: add a single function for color/depth&stencil fragment resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:39 +00:00
Samuel Pitoiset
8d0206c95f radv/meta: simplify creating pipelines for color/depth&stencil fragment resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:39 +00:00
Samuel Pitoiset
009cf9bfa7 radv/meta: pass a resolve mode for fragment color resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:38 +00:00
Samuel Pitoiset
2c5685ed89 radv/meta: inline one function in the fragment resolve path 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:38 +00:00
Samuel Pitoiset
876b204703 radv/meta: use the same shader for color/depth&stencil fragment resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:37 +00:00
Samuel Pitoiset
fd9cbff41a radv/meta: move the barrier for color fragment resolves outside 
This barrier is only needed for rendering resolves (ie. not for
vkCmdResolveImage()). Though, these barriers are likely unnecessary
but let's keep them for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:37 +00:00
Samuel Pitoiset
255439fd9c radv/meta: fix the shader stage for push constants in the fragment resolve path 
RADV doesn't use it but better to set it correctly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:37 +00:00
Samuel Pitoiset
ed546ce809 radv/meta: add a single function for color/depth&stencil compute resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:36 +00:00
Samuel Pitoiset
94234f35fd radv/meta: simplify creating pipelines for color/depth&stencil compute resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:36 +00:00
Samuel Pitoiset
1c7b416daa radv/meta: pass a resolve mode for compute color resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:36 +00:00
Samuel Pitoiset
2ae32d709c radv/meta: inline one function in the compute resolve path 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:35 +00:00
Samuel Pitoiset
e3e52c348c radv/meta: use the same shader for color/depth&stencil compute resolves 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:35 +00:00
Samuel Pitoiset
08f147d92c radv/meta: add depth/stencil support to the core resolve shader 
This removes lot of duplicated code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:34 +00:00
Samuel Pitoiset
1e561eb1d7 radv/meta: replace radv_meta_resolve_type by VkImageAspectFlags 
It's either depth or stencil.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40064>
 2026-02-27 08:21:34 +00:00
Rhys Perry
070a741855 radv: don't cache esgs_ring_size/gsvs_ring_size 
These are calculated using ac_gpu_info::max_se.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:15 +00:00
Rhys Perry
7c66adf97e ac/llvm: pass ac_cu_info to ac_llvm_context_init 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:15 +00:00
Rhys Perry
43603f9b1d amd: add ac_cu_info::local_invocation_ids_packed 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:15 +00:00
Rhys Perry
5963eff1a2 amd: add ac_cu_info::has_vrs_frag_pos_z_bug 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:14 +00:00
Rhys Perry
29f8237d30 amd: move various flags to ac_cu_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:14 +00:00
Rhys Perry
567967350e ac/gpu_info: remove padding from ac_cu_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:13 +00:00
Rhys Perry
c99345bd5a ac/gpu_info: fix outdated comment 
This doesn't seem to be compiled into mesh/task shaders anymore.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:13 +00:00
Rhys Perry
78b3e07bed ac/nir: remove ac_nir_lower_ps_late_options::family 
This is unused.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:12 +00:00
Rhys Perry
6d31054d86 ac/nir: remove gfx_level parameter from ac_nir_lower_indirect_derefs 
This was unused.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:12 +00:00
Rhys Perry
724f65f96c radv: remove radv_physical_device::max_shared_size 
lds_size_per_workgroup is the same thing.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:11 +00:00
Rhys Perry
8017478074 radv: fix size of reserved in radv_physical_device_cache_key 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39992>
 2026-02-26 15:49:11 +00:00
Benjamin Cheng
39839af4e1 radv/video: Disable qp map for h265 on vcn1
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Quantization maps cannot work with cu_qp_delta_enabled = 1, and VCN1 is
unlikely to ever support it.

See 1dda9d56cb ("radv/video: Disable rate control modes for H265 encode on VCN1")
for additional details.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40052>
 2026-02-26 11:54:13 +00:00
Samuel Pitoiset
4b52a537a5 radv: remove an useless check for VK_IMAGE_LAYOUT_PREINITIALIZED 
VK_IMAGE_LAYOUT_PREINITIALIZED is only well defined for linear images
in Vulkan, and linear images can't have DCC. So, this was dead code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40070>
 2026-02-26 07:44:39 +00:00
Samuel Pitoiset
5c371010c1 radv/meta: stop using pdev for some query resolve shaders
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40041>
 2026-02-26 07:21:06 +00:00
Samuel Pitoiset
122958344a radv/meta: stop using pdev for building the resolve meta shaders 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40041>
 2026-02-26 07:21:06 +00:00
Samuel Pitoiset
81932d6731 radv/meta: stop using pdev for shaders that use addr<->coord helpers 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40041>
 2026-02-26 07:21:06 +00:00
Samuel Pitoiset
e8710152fb ac/nir: stop passing radeon_info for addr->coord helpers 
Only for gb_addr_config.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40041>
 2026-02-26 07:21:06 +00:00
Georg Lehmann
8f4de30d05 aco/insert_fp_mode: don't skip setting round for fract
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fract(-FLT_MIN) is < 1.0 with rtz but 1.0 with rtne.

Fixes: 7212a75c5e ("aco/insert_fp_mode: exclude some instructions that will never round")

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40078>
 2026-02-26 00:20:02 +00:00
Samuel Pitoiset
52aaf307df radv: use radv_physical_cache_key::clear_lds more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40088>
 2026-02-25 20:28:44 +00:00
Samuel Pitoiset
229e892e42 radv: use radv_physical_cache_key::disable_shrink_image_store more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40088>
 2026-02-25 20:28:44 +00:00
Samuel Pitoiset
55691035e8 radv: use radv_physical_cache_key::disable_aniso_single_level more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40088>
 2026-02-25 20:28:43 +00:00
Samuel Pitoiset
f045c04b50 radv: use radv_physical_cache_key::disable_trunc_coord more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40088>
 2026-02-25 20:28:43 +00:00
Samuel Pitoiset
d7447012ef radv/nir: use radv_physical_cache_key::bvh8 more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40088>
 2026-02-25 20:28:43 +00:00
Samuel Pitoiset
1457c39f5a radv/nir: use radv_physical_cache_key::emulate_rt more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40088>
 2026-02-25 20:28:43 +00:00
Samuel Pitoiset
246b8501ce radv/nir: use radv_physical_cache_key::no_rt more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40088>
 2026-02-25 20:28:41 +00:00
Benjamin Cheng
f8f80c3700 ac/parse_ib: Fix VCN address parsing 
Some VCN IB packages (namely the common ops) put the address with the lo
part first.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40068>
 2026-02-25 16:59:31 +00:00
Ruijing Dong
f8eef1024c ac/vcn: correct a typo in av1 dec header 
Correct a typo in AV1 frame header definition.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37650>
 2026-02-25 09:02:28 +00:00
Samuel Pitoiset
c4d5090d69 radv: fix potential GPU hangs with secondaries on transfer queue 
Cache flushes should be skipped on SDMA. In practice,
radv_emit_cache_flush() should only be called on GFX/ACE.

SDMA NOP packets are emitted in barriers directly.

This fixes recent VKCTS coverage
dEQP-VK.api.command_buffers.secondary_on_transfer_queue.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39964>
 2026-02-25 08:16:57 +01:00
Samuel Pitoiset
2eb9420061 ac/nir: fix writemask for dual source blending on GFX11+
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This should definitely be an OR operation if MRT0 and MRT1 don't write
the same channels. This also requires to set the writemask manually
because when it's 0 (in case a dual-source output is missing), the
intrinsic computes the mask itself with the number of components.

No fossils-db changes on NAVI33.

Fixes: 45d8cd037a ("ac/nir: rewrite ac_nir_lower_ps epilog to fix dual src blending with mono PS")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14878
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39996>
 2026-02-24 20:20:02 +00:00
Rhys Perry
05586fae67 radv: combine v_mov_dpp into fma in frag_coord.z adjust 
This wasn't possible before because of the literal.

fossil-db (vangogh):
Totals from 3766 (3.36% of 112041) affected shaders:
Instrs: 5646975 -> 5642967 (-0.07%); split: -0.09%, +0.02%
CodeSize: 30751152 -> 30749956 (-0.00%); split: -0.02%, +0.02%
VGPRs: 262640 -> 262672 (+0.01%); split: -0.01%, +0.02%
Latency: 184869423 -> 184883681 (+0.01%); split: -0.02%, +0.03%
InvThroughput: 43462111 -> 43456113 (-0.01%); split: -0.03%, +0.02%
VClause: 93337 -> 93353 (+0.02%); split: -0.10%, +0.12%
SClause: 186857 -> 186833 (-0.01%); split: -0.07%, +0.06%
Copies: 390583 -> 390327 (-0.07%); split: -0.44%, +0.38%
Branches: 106070 -> 106086 (+0.02%); split: -0.03%, +0.05%
VALU: 4112856 -> 4108839 (-0.10%); split: -0.12%, +0.02%
SALU: 593814 -> 593758 (-0.01%); split: -0.05%, +0.04%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40013>
 2026-02-24 18:34:38 +00:00
Rhys Perry
437a3d5ade radv: disable fast math for frag_coord.z adjust 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40013>
 2026-02-24 18:34:37 +00:00
Caterina Shablia
5e25953690 radv: move all image checks into radv_image_need_retile 
There's no reason to have these checks be smeared between
radv_image_need_retile and radv_retile_transition.

Make radv_image_need_retile verify that the image might ever
need to have its displayable DCC updated.

Also, radv_image_need_retile should not care about the command
buffer. We should never try to do retile transition on a
command buffer that can't do compute to begin with.

Make radv_retile_transition only check whether the layout
we're transitioning to might involve reading the displayable
DCC, and perform retiling if so.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39990>
 2026-02-24 18:08:53 +00:00