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Author SHA1 Message Date
Daniel Schürmann
f1565de4cc radv: expose radv_pipeline_capture_shaders() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
 2023-03-07 17:00:50 +00:00
Daniel Schürmann
2fbd495ce7 radv: expose radv_postprocess_nir() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
 2023-03-07 17:00:50 +00:00
Samuel Pitoiset
c87c34bbba radv: fix defining RADV_USE_WSI_PLATFORM 
RADV_USE_WSI_PLATFORM was unused in radv_CreateImage().

Fixes: 2a5d7f4926 ("radv: fix missing implementation of creating images from swapchains")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21763>
 2023-03-07 16:37:17 +00:00
Samuel Pitoiset
7b2086d741 radv: fix border color swizzle for stencil-only format on GFX9+ 
Swizzle of 8-bit stencil format is defined as _x__ but the hw expects
BC_SWIZZLE_XYZW.

Fixes dEQP-VK.pipeline.monolithic.sampler.border_swizzle.*s8_uint*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21482>
 2023-03-07 15:10:33 +00:00
Yogesh Mohan Marimuthu
347a5b79f9 ac/surface: only adjust pitch if surf_pitch was modified 
Modifying pitch for all LINEAR surface isn't correct;
the original change that modified surf_pitch was only
intended for YUV textures.

This fixes vkGetImageSubresourceLayout rowPitch return value
for VK_FORMAT_BC3_UNORM_BLOCK + VK_IMAGE_TILING_LINEAR.

Fixes: fcc499d5 (ac/surface: adjust gfx9.pitch[*] based on surf->blk_w)

v2: add check for UYVY format (Pierre-Eric)
v3: move blk_w division to above if check (Pierre-Eric)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21595>
 2023-03-07 13:50:31 +00:00
Georg Lehmann
de4805f25f aco: use bitfield array helpers for valu modifiers 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
e7559da757 aco: add bitfield array helper classes 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
097a97cc42 aco: remove VOP[123C]P? structs 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
08542318e7 aco/optimizer: simplify using VALU instruction 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
4591703e79 aco/print_ir: simplify using VALU instruction 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
17ff2e8c52 aco: validate VALU modifiers 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
fc193ab4db aco/ra: set opsel_hi to zero when converting to VOP2 
Otherwise the new modifier validation will fail.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
366cf4efaa aco/ir: rework IR to have one common valu instruction struct 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Georg Lehmann
77afe7d960 aco: treat VINTERP_INREG as VALU 
It's just v_fma with fixed DPP8 and builtin s_waitcnt_expcnt, so it can mostly
be handled as a pure VALU instruction.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
 2023-03-07 11:53:23 +00:00
Samuel Pitoiset
c119b19f98 radv: fix incorrect stride for primitives generated query with GDS 
When the query pool uses GDS (for NGG), the stride is 40.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8412
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21650>
 2023-03-07 10:15:35 +01:00
Samuel Pitoiset
5ec80ab37c radv: do not add descriptor BOs on update when the global BO list is used 
It's unnecessary and already checked elsewhere like in
vkCmdBindDescriptorSets(). This improves performance of vkoverhead
test #76 (descriptor_1image) by +18%. It's the same performance as
PRO on my Threadripper 1950X now. This should also slightly improve
texel and buffer descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20699>
 2023-03-07 07:30:29 +00:00
Daniel Schürmann
7fadee9b70 radv/rt: only reserve stack_sizes after rt_case insertion 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21667>
 2023-03-06 13:58:54 +00:00
Daniel Schürmann
3e03fe44e7 radv/rt: move stack_sizes into radv_ray_tracing_module 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21667>
 2023-03-06 13:58:54 +00:00
Daniel Schürmann
48edcd03c5 radv/rt: introduce struct radv_ray_tracing_module 
This is preliminary work for separate shader functions.
The ray_tracing_module is eventually intended as self-contained
pipeline struct per RT group.

For now, these modules only contain the group handles.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21667>
 2023-03-06 13:58:54 +00:00
Daniel Schürmann
4dafb69d61 radv/rt: defer library_pipeline allocation 
We will need the number of groups at allocation time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21667>
 2023-03-06 13:58:54 +00:00
Daniel Schürmann
a62d699664 radv/rt: rename library_pipeline->groups to library_pipeline->group_infos 
'groups' will later be used for ray_tracing_modules.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21667>
 2023-03-06 13:58:54 +00:00
Samuel Pitoiset
7c1563aebe radv/ci: update CI lists for CTS 1.3.5.0 on GFX110/POLARIS10/PITCAIRN 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21689>
 2023-03-06 08:53:31 +00:00
Samuel Pitoiset
81eaf7b9e4 radv/ci: stop skipping some graphics pipeline library tests 
They are fixed in CTS 1.3.5.0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21689>
 2023-03-06 08:53:30 +00:00
Friedrich Vock
f5061758be radv: Use LDS for closest-hit hit attributes 
Q2RTX: 23.1ms -> 22.9ms

shader-db:
Totals from 19 (0.69% of 2764) affected shaders:

MaxWaves: 197 -> 208 (+5.58%)
Instrs: 87702 -> 87817 (+0.13%); split: -0.03%, +0.16%
CodeSize: 474320 -> 475128 (+0.17%)
VGPRs: 1840 -> 1728 (-6.09%)
Latency: 2771599 -> 2773173 (+0.06%); split: -0.13%, +0.18%
InvThroughput: 561281 -> 533010 (-5.04%); split: -5.16%, +0.12%
VClause: 2782 -> 2788 (+0.22%); split: -0.18%, +0.40%
Copies: 12115 -> 12136 (+0.17%); split: -0.45%, +0.63%
Branches: 4116 -> 4122 (+0.15%)
PreVGPRs: 1665 -> 1638 (-1.62%); split: -1.92%, +0.30%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21635>
 2023-03-05 21:53:34 +00:00
Friedrich Vock
c1651a1032 radv: Extend hit attribute lowering for LDS 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21635>
 2023-03-05 21:53:34 +00:00
Eric Engestrom
78578a6ddb vk: move radv's linker symbols scripts for use in all drivers 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
 2023-03-04 07:41:10 +00:00
Konstantin Seurer
f094e69469 radv/rt: Use ushr for extracting the cull mask 
Fixes the following tests:
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.16_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.16_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.16_bits

Fixes: 2d93ab7 ("radv/rt: Pre shift cull_mask")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21659>
 2023-03-03 23:56:49 +00:00
Timur Kristóf
05e6d945ad radv: Emulate VGT_ESGS_ITEMSIZE in shaders on GFX9+. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21434>
 2023-03-03 20:15:10 +00:00
Rhys Perry
8aff7152a0 aco: make IDSet sparse 
Improves compilation time of huge shaders.

A ray tracing pipeline of Hellblade: Senua's Sacrifice compiles in about
half the time, with this patch.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8179
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21022>
 2023-03-03 17:45:14 +00:00
Rhys Perry
736d6643bb aco/tests: add tests for v_fma_f32 with 2 fp16 literals 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21633>
 2023-03-03 14:20:55 +00:00
Samuel Pitoiset
3e4541bb56 radv/ci: adjust timeouts for Vega10 and Renoir 
With latest CTS it takes much more time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21390>
 2023-03-03 08:23:22 +00:00
Samuel Pitoiset
f775873f81 ci: uprev CTS to 1.3.5.0 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21390>
 2023-03-03 08:23:21 +00:00
Samuel Pitoiset
3b9937c85e radv: stop allocationg the attr ring BO for compute queues on GFX11 
Only needed for graphics. This saves ~8Mib of 32-bit VRAM per compute
queue.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21632>
 2023-03-03 07:27:21 +00:00
Hans-Kristian Arntzen
b7926303e6 radv: Expose VK_EXT_swapchain_maintenance1. 
Passes dEQP-VK.wsi.*.maintenance1.*.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20235>
 2023-03-03 03:59:13 +00:00
Marek Olšák
4f7e353237 amd: lower multi-component subdword SSBO loads in NIR 
because the hw and LLVM only support subdword single-component SSBO loads,
and ac_nir_to_llvm splits multi-component loads because of that, which is
inefficient.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19399>
 2023-03-03 03:27:40 +00:00
Marek Olšák
82919e2dcb amd: lower subdword UBO loads in NIR 
This fixes broken subdword UBO loads with LLVM.

It's only needed for LLVM, but it's done for both LLVM and ACO because
the pass can be fully validated only with ACO and the Vulkan CTS right now.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19399>
 2023-03-03 03:27:40 +00:00
Marek Olšák
1a424fee4a ac/llvm: implement nir_op_unpack_32_4x8 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19399>
 2023-03-03 03:27:40 +00:00
Marek Olšák
6aee999131 aco: implement nir_op_unpack_32_4x8 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19399>
 2023-03-03 03:27:40 +00:00
Marek Olšák
09005e6dfc ac/nir: add ac_nir_lower_subdword_loads to lower 8/16-bit loads to 32 bits 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19399>
 2023-03-03 03:27:40 +00:00
Marek Olšák
0669d7c29b radeonsi: remove Smart Access Memory because CPU access has large overhead 
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8176

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:49 +00:00
Marek Olšák
3c9aa3e201 amd/rtld: allow 64K LDS for all shader stages except for gfx6 
Gfx6 can only use 32K LDS per workgroup.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Marek Olšák
ccaaf8fe04 amd: massively simplify how info->spi_cu_en is applied 
Instead of having ac_set_reg_cu_en that sets the register, replace it with
ac_apply_cu_en that only returns the modified register value,
which allows a large simplification in both drivers because a lot of code
becomes duplicated after it's switched to ac_apply_cu_en.

RADV also didn't apply it to a few registers. Fixed.

This removes 82 lines of code in total.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Marek Olšák
2b3f551ed8 ac/nir: don't use load_esgs_vertex_stride_amd on gfx6-8 
An improvement for 9f1e6d8f70.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Marek Olšák
79732416fd amd: query cache sizes from the kernel 
Also rename l1_cache_size -> tcp_cache_size. L1 means shader array cache.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Marek Olšák
6e2e89e6d8 amd,radeonsi: change enabled_rb_mask to 64 bits 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Marek Olšák
03ffb8d77c amd: update amdgpu_drm.h 
From kernel commit 817714d9665e.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Rhys Perry
dc01f03d1b radv: remove is_internal pipeline creation parameter 
Instead, check if the cache is the meta shader cache. This catches the
shaders created by radv_create_radix_sort_u64().

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21606>
 2023-03-02 16:48:09 +00:00
Samuel Pitoiset
4ec6850210 radv: fix DCC decompress on GFX11 
The hardware requires one color output to be set by CB registers,
otherwise the DCC decompression does nothing.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8127
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8175
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8370
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21629>
 2023-03-02 16:03:31 +00:00
Tatsuyuki Ishi
57ab623f0b radv: Use common helpers to translate format in SDMA copy. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21585>
 2023-03-02 15:29:47 +00:00
Tatsuyuki Ishi
4f681d5e2c radv: Remove SDMA padding from copy helpers. 
These are handled in winsys already; no need to duplicate and complicate
the code paths.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21585>
 2023-03-02 15:29:47 +00:00