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radv/rt: Use ushr for extracting the cull mask

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Fixes the following tests:
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.16_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.16_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.16_bits

Fixes: 2d93ab7 ("radv/rt: Pre shift cull_mask")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21659>
This commit is contained in:
Konstantin Seurer 2023-03-02 17:21:13 +01:00 • committed by Marge Bot
parent d89aea73e2
commit f094e69469
1 changed files with 1 additions and 1 deletions
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2
src/amd/vulkan/radv_rt_shader.c
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@ -537,7 +537,7 @@ lower_rt_instructions(nir_shader *shader, struct rt_variables *vars, unsigned ca
}
case nir_intrinsic_load_cull_mask: {
ret =
nir_ishr_imm(&b_shader, nir_load_var(&b_shader, vars->cull_mask_and_flags), 24);
nir_ushr_imm(&b_shader, nir_load_var(&b_shader, vars->cull_mask_and_flags), 24);
break;
}
case nir_intrinsic_ignore_ray_intersection: {