Commit graph

96897 commits

Author SHA1 Message Date
Matt Turner
f11fa5ac6c i965: Add align1 ternary instruction disassembler support
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:17 -07:00
Matt Turner
6c7fc9b73a i965: Add align1 ternary instruction-word support
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:17 -07:00
Matt Turner
3b2c868848 i965: Add align1 ternary instruction support to conversion functions
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:17 -07:00
Matt Turner
281e8b8f27 i965: Add align1 ternary instruction field encodings
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:17 -07:00
Matt Turner
5f6ee55e68 i965: Add functions to abstract access to 3src register types
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:17 -07:00
Matt Turner
e15dac319b i965: Rename brw_inst's functions that access the 3src register type
Put hw_ in the name so that it's clear these are the hardware encodings.

Similar to commit 9fb8323328 ("i965: Rename brw_inst's functions that
access the register type")

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:16 -07:00
Matt Turner
e7f3b82e03 i965: Rename brw_inst 3src functions in preparation for align1
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:16 -07:00
Matt Turner
ba50b538af i965: Print subreg in units of type-size on ternary instructions
The instruction word contains SubRegNum[4:2] so it's in units of dwords
(hence the * 4 to get it in terms of bytes). Before this patch, the
subreg would have been wrong for DF arguments.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:16 -07:00
Matt Turner
3f14150e9a i965: Add functions for brw_reg_type <-> hw 3src type
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:16 -07:00
Matt Turner
4c857d1f3b i965: Move brw_reg_type_is_floating_point to brw_reg_type.h
I'm going to call this from brw_inst.h, and I don't want to have to
include all of brw_reg.h.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
2017-10-20 15:00:16 -07:00
Jason Ekstrand
59fb59ad54 nir: Get rid of nir_shader::stage
It's redundant with nir_shader::info::stage.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-10-20 12:49:17 -07:00
Samuel Pitoiset
341529dbee radv: use optimal packet order for draws
Ported from RadeonSI. The time where shaders are idle should
be shorter now. This can give a little boost, like +6% with
the dynamicubo Vulkan demo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 20:07:53 +02:00
Samuel Pitoiset
af6985b309 radv: add radv_emit_shaders_prefetch()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 20:07:53 +02:00
Samuel Pitoiset
0d85f4a9e2 radv: add radv_emit_shader_prefetch()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 20:07:53 +02:00
Marek Olšák
46f452dd5f st/mesa: correct a u_vbuf comment
trivial.
2017-10-20 18:56:20 +02:00
Christian Gmeiner
65ccee2dc2 etnaviv: fix implicit conversion warning
Galliums query_type used in APIs is unsigned.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-10-20 12:42:55 +02:00
Christian Gmeiner
57a586828f etnaviv: enable occlusion query if GPU supports it
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-10-20 12:42:48 +02:00
Christian Gmeiner
246243d447 etnaviv: add support for occlusion queries
Passes most occlusion query piglits. The following piglits are broken:
- spec@arb_occlusion_query@occlusion_query_meta_fragments
- spec@arb_occlusion_query@occlusion_query_meta_save
- spec@arb_occlusion_query2@render

v1 -> v2:
 - use one sample provider for all occlusion queries tyes
 - add comment about 'magic' value 0x1DF5E76

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-10-20 12:42:44 +02:00
Christian Gmeiner
282d8698ec etnaviv: add basic infrastructure for hw queries
No hardware query is supported yet.

v1 -> v2
 - removed query_type from strcut etna_hw_sample_provider

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-10-20 12:42:40 +02:00
Christian Gmeiner
b8c335c91b etnaviv: update headers from rnndb
Update to etna_viv commit 6c9c706.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-10-20 12:42:35 +02:00
Chris Wilson
aa65dcd1d7 relnotes/17.3: EGL_IMG_context_priority is now implemented
Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-10-20 11:28:18 +01:00
Chris Wilson
f72392231b i965: Report supported context priorities to EGL/DRI
Hook up the RendererQuery for __DRI2_RENDERER_HAS_CONTEXT_PRIORITY to
report the available DRM_I915_GEM_CONTEXT_SETPARAM options based on the
per-client default context. The kernel will validate the request to change
the property, so we get an accurate reflection of available support
(based on kernel version and privilege) and we should only have to do it
once during screen setup -- although the SETPARAM should be fast, they
are still an ioctl each.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-10-20 11:28:17 +01:00
Chris Wilson
1617fca6d1 i965: Pass the EGL/DRI context priority through to the kernel
Decode the EGL/DRI priority enum into the [-1023, 1023] range as
interpreted by the kernel and call DRM_I915_GEM_CONTEXT_SETPARAM to
adjust the priority. We use 0 as the default medium priority (also the
kernel default) and so only need adjust up or down. By only doing the
adjustment if not setting to medium, we can faithfully report any error
whilst setting without worrying about kernel version.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-10-20 11:28:17 +01:00
Chris Wilson
21023954f8 i965: Record the presence of the kernel scheduler
Mention to the debug log if the kernel scheduler is enabled; and in
particular if it has preemption enabled.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-10-20 11:28:17 +01:00
Chris Wilson
98c2b7f9fa i965: Sync i915_drm.h from kernel for IMG_context_priority
Pulling in changes up to

    kernel commit ac14fbd460d0ec16e7750e40dcd8199b0ff83d0a
    Author: Chris Wilson <chris@chris-wilson.co.uk>
    Date:   Tue Oct 3 21:34:53 2017 +0100

	drm/i915/scheduler: Support user-defined priorities

and including the fixup from

    kernel commit 822a4b673284672af697ccd66e8795f8a712a90d
    Author: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
    Date:   Fri Oct 6 13:45:59 2017 +0300

	drm/i915: Don't use BIT() in UAPI section

for implementing IMG_context_priority.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-10-20 11:28:17 +01:00
Chris Wilson
5c5618338a egl,dri: Propagate context priority hint to driver->CreateContext
Jump through the layers of abstraction between egl and dri in order to
feed the context priority attribute through to the backend. This
requires us to read the value from the base _egl_context, convert it to
a DRI attribute, parse it again in the generic context creator before
passing it to the driver as a function parameter.

In order to not require us to pass back the actual value of the context
priority after creation, we impose that drivers should report the
available set of priorities during screen setup (and then they may chose
to fail if given an invalid value as that should have been checked at
the user boundary.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net> # i915/i965
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-10-20 11:28:17 +01:00
Chris Wilson
95ecf3df62 egl: Support IMG_context_priority
IMG_context_priority
https://www.khronos.org/registry/egl/extensions/IMG/EGL_IMG_context_priority.txt

    "This extension allows an EGLContext to be created with a priority
    hint. It is possible that an implementation will not honour the
    hint, especially if there are constraints on the number of high
    priority contexts available in the system, or system policy limits
    access to high priority contexts to appropriate system privilege
    level. A query is provided to find the real priority level assigned
    to the context after creation."

The extension adds a new eglCreateContext attribute for choosing a
priority hint. This stub parses the attribute and copies into the base
struct _egl_context, and hooks up the query similarly.

Since the attribute is purely a hint, I have no qualms about the lack of
implementation before reporting back the value the user gave!

v2: Remember to set the default ContextPriority value to medium.
v3: Use the driRendererQuery interface to probe the backend for
supported priority values and use those to mask the EGL interface.
v4: Treat the priority attrib as a hint and gracefully mask any requests
not supported by the driver, the EGLContext will remain at medium
priority.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rob Clark <robdclark@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Emil Velikov <emli.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-10-20 11:28:17 +01:00
Fredrik Höglund
e2053b8e3d radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BIT
The Vulkan specification says:

   "... an execution dependency with only VK_PIPELINE_STAGE_TOP_OF_-
    PIPE_BIT in the source stage mask will effectively not wait for
    any prior commands to complete."

Signed-off-by: Fredrik Höglund <fredrik@kde.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-10-20 11:37:51 +02:00
Samuel Pitoiset
565c22158f radv: mark total_count as MAYBE_UNUSED in CmdSet{Viewport,Scissor}
Fixes two compilation warnings in release build. Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-10-20 11:22:19 +02:00
Samuel Pitoiset
c8f2b73656 radv: rename radv_cmd_buffer_flush_state() to radv_draw()
Similar to the dispatch codepath.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 11:20:16 +02:00
Samuel Pitoiset
9e45e5c9fd radv: emit primitive restart from radv_emit_draw_registers()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 11:20:14 +02:00
Samuel Pitoiset
93207a8e89 radv: add radv_emit_draw_registers()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 11:20:12 +02:00
Samuel Pitoiset
9466856456 radv: refactor indirect draws (+count buffer) with radv_draw_info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 11:20:11 +02:00
Samuel Pitoiset
75dfab24a2 radv: refactor indirect draws with radv_draw_info
Indirect draws with a count buffer will be refactored in a
separate patch.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 11:20:08 +02:00
Samuel Pitoiset
03afa95d9f radv: refactor simple and indexed draws with radv_draw_info
Similar to the dispatch compute logic but for draw calls. For
convenience, indirect draws will be converted in a separate
patch.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 11:20:05 +02:00
Samuel Pitoiset
54fa635f82 radv: re-emit VGT_INDEX_TYPE because non-indexed draws overwrite it
Only on CIK and later. We should only update VGT_INDEX_TYPE but
it seems easier to re-emit all the index buffer packets.

Fixes: 966d66f28f (radv: do not re-emit the index buffer for every draw call)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 10:40:01 +02:00
Samuel Pitoiset
eae46f192e radv: clear the dirty flags in the corresponding emit helpers
This will allow us to fix the VGT_INDEX_TYPE issue properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 10:39:28 +02:00
Samuel Pitoiset
68cd3564a0 radv: rename RADV_CMD_DIRTY_RENDER_TARGETS to RADV_CMD_DIRTY_FRAMEBUFFER
To be consistent with the emit function name.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 10:39:26 +02:00
Samuel Pitoiset
94e69f4141 radv: move DB_COUNT_CONTROL initialization to si_emit_config()
CLEAR_STATE will initialize DB_COUNT_CONTROL to 0 for CIK+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 10:38:11 +02:00
Samuel Iglesias Gonsálvez
9e515cf381 i965/vec4: remove setting default LOD in the backend
It is already done in NIR.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-20 08:29:53 +02:00
Samuel Iglesias Gonsálvez
c6d7d09bd0 i965/fs: remove setting default LOD in the backend
It is already done in NIR.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-10-20 08:29:53 +02:00
Samuel Iglesias Gonsálvez
e382890e25 nir: set default lod to texture opcodes that needed it but don't provide it
v2:
- Use helper to add a new source to the texture instruction.

v3:
- Use nir_tex_instr_src_index() to simplify the patch (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-10-20 08:29:09 +02:00
Bas Nieuwenhuizen
6bc42855f9 radv: enable GS on GFX9
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 07:14:00 +01:00
Bas Nieuwenhuizen
73749caf0e radv: calculate and emit GFX9 GS registers to pipeline state.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:23:47 +01:00
Bas Nieuwenhuizen
9961ae2447 ac/nir: Fix up GS input vgprs.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:23:37 +01:00
Bas Nieuwenhuizen
d4ecc3c929 ac/nir: Add loading from LDS for merged GS.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:23:29 +01:00
Bas Nieuwenhuizen
ec53e52742 ac/nir: Add ES output to LDS for GFX9.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:23:18 +01:00
Bas Nieuwenhuizen
3e77333030 ac/nir: Add merged GS function.
[airlied: merged fixup + and fixed up a couple more bits].

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:23:14 +01:00
Bas Nieuwenhuizen
f82797b56d radv: Only emit TES when it exists.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:14:14 +01:00
Bas Nieuwenhuizen
6e21b7a294 radv: Use control shader presence for detecting tess.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:11:10 +01:00