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120753 commits

Author SHA1 Message Date
Dave Airlie
ee3ed20f3d draw: fix tess eval pipeline statistics.
The number of invocations wasn't getting incremented correctly.

Fixes: 202bc38ce9 ("draw: collect tessellation invocations statistics")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7597>
(cherry picked from commit ce07c52b82)
2020-11-17 10:57:32 -08:00
Christian Gmeiner
e5327be5ac etnaviv: nir: do not run opt loop after nir_lower_bool_xxx(..)
Running the optimizations after bool to float/int lowering is not going
to work. Large portions of NIR are likely to blow up if they see
floats/ints in weird places. Most of the bool->float/int conversions
are direct instruction substitutions and it's not going to leave a lot
of garbage around to optimize.

Fixes nir.h:261: nir_const_value_as_bool: Assertion `i == 0 || i == -1' failed
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.no_iterations_vertex

Here are shader-db results for GC2000:

instructions HURT:   shaders/tesseract/488.shader_test FRAG:           516 -> 524 (1.55%)
instructions HURT:   shaders/tesseract/491.shader_test FRAG:           248 -> 260 (4.84%)
instructions HURT:   shaders/tesseract/494.shader_test FRAG:           244 -> 256 (4.92%)
instructions HURT:   shaders/tesseract/238.shader_test FRAG:           232 -> 244 (5.17%)
instructions HURT:   shaders/tesseract/241.shader_test FRAG:           232 -> 244 (5.17%)
instructions HURT:   shaders/tesseract/127.shader_test FRAG:           76 -> 80 (5.26%)
instructions HURT:   shaders/tesseract/130.shader_test FRAG:           148 -> 156 (5.41%)
instructions HURT:   shaders/tesseract/226.shader_test FRAG:           192 -> 204 (6.25%)
instructions HURT:   shaders/tesseract/229.shader_test FRAG:           192 -> 204 (6.25%)
instructions HURT:   shaders/tesseract/217.shader_test FRAG:           152 -> 164 (7.89%)
instructions HURT:   shaders/tesseract/214.shader_test FRAG:           152 -> 164 (7.89%)
instructions HURT:   shaders/tesseract/205.shader_test FRAG:           112 -> 124 (10.71%)
instructions HURT:   shaders/tesseract/202.shader_test FRAG:           112 -> 124 (10.71%)
instructions HURT:   shaders/tesseract/169.shader_test FRAG:           32 -> 36 (12.50%)
instructions HURT:   shaders/tesseract/166.shader_test FRAG:           32 -> 36 (12.50%)
instructions HURT:   shaders/deqp_gles3/61312.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/deqp_gles3/61309.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/deqp_gles3/61324.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/tesseract/118.shader_test FRAG:           28 -> 32 (14.29%)
instructions HURT:   shaders/tesseract/181.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/178.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/121.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/193.shader_test FRAG:           72 -> 84 (16.67%)
instructions HURT:   shaders/tesseract/190.shader_test FRAG:           72 -> 84 (16.67%)

total instructions in shared programs: 64220 -> 64572 (0.55%)
instructions in affected programs: 4924 -> 5276 (7.15%)
helped: 5
HURT: 24
helped stats (abs) min: 4 max: 8 x̄: 5.60 x̃: 4
helped stats (rel) min: 4.35% max: 5.41% x̄: 4.72% x̃: 4.35%
HURT stats (abs)   min: 4 max: 60 x̄: 15.83 x̃: 12
HURT stats (rel)   min: 1.55% max: 16.67% x̄: 10.04% x̃: 10.71%
95% mean confidence interval for instructions value: 5.39 18.89
95% mean confidence interval for instructions %-change: 4.81% 10.18%
Instructions are HURT.

total temps in shared programs: 2514 -> 2512 (-0.08%)
temps in affected programs: 9 -> 7 (-22.22%)
helped: 2
HURT: 0

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7624>
(cherry picked from commit 9b6516ac24)
2020-11-17 10:57:32 -08:00
Vinson Lee
b8ddfc0bb7 vdpau: Add missing printf format specifier.
Fix defect reported by Coverity Scan.

Extra argument to printf format specifier (PRINTF_ARGS)
extra_argument: This argument was not used by the format string: vmixer->max_layers.

Fixes: 89b9863252 ("vdpau: Add support for parameters")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7200>
(cherry picked from commit 3fe5c13d71)
2020-11-17 10:57:31 -08:00
Rob Clark
159ded9481 freedreno/ir3: Fix crash in shader compile fail path
Fixes: 74140c2e85 ("freedreno/ir3: convert over to ralloc")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7612>
(cherry picked from commit 4b65c09d86)
2020-11-17 10:57:31 -08:00
Icecream95
4de41dea58 panfrost: Fix stack shift calculation
Fixes flickering in Neverwinter Nights.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3789
Fixes: e6152091ca ("panfrost: Use canonical characterization of tls_size")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7613>
(cherry picked from commit 12dec2004e)
2020-11-17 10:57:31 -08:00
Nanley Chery
b37d613da5 mesa: Clamp some depth values in glClearBufferfi
OpenGL 3.0 spec, section 4.2.3 "Clearing the Buffers":

   depth and stencil are the values to clear the depth and stencil
   buffers to, respectively. Clamping and type conversion for
   fixed-point depth buffers are performed in the same fashion as for
   ClearDepth.

Enables iris to pass the clearbuffer-depth-stencil piglit test.

Cc: mesa-stable
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7410>
(cherry picked from commit 2e713313a2)
2020-11-17 10:57:31 -08:00
Nanley Chery
d47cb4124a mesa: Clamp some depth values in glClearBufferfv
OpenGL 3.0 spec, section 4.2.3 "Clearing the Buffers":

   If buffer is DEPTH, drawbuffer must be zero, and value points to the
   single depth value to clear the depth buffer to. Clamping and type
   conversion for fixed-point depth buffers are performed in the same
   fashion as for ClearDepth.

Enables iris to pass the clearbuffer-depth piglit test.

v2. Add spec citation. (Eric Anholt)
v3. Don't clamp floating point formats. (Eric Anholt)

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7410>
(cherry picked from commit 1bf539b3a2)
2020-11-17 10:57:31 -08:00
Nanley Chery
5b83eb0b09 mesa: Add and use _mesa_has_depth_float_channel
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7410>
(cherry picked from commit fda015023a)
2020-11-17 10:57:31 -08:00
Rhys Perry
004b8b105f aco: disallow various v_add_u32 opts if modifiers are used
Check for clamp, SDWA or DPP. The optimization isn't possible with SDWA
and DPP, so it would have been skipped anyway. Doing any of these with a
clamp modifier present would be incorrect.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
(cherry picked from commit 966732e8ca)
2020-11-13 10:06:58 -08:00
Rhys Perry
46ab4f9171 aco: fix combine_constant_comparison_ordering() NaN check with 16/64-bit
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
(cherry picked from commit 91ffeed88a)
2020-11-13 10:05:42 -08:00
Rhys Perry
afe279ad86 aco: don't combine precise max(min()) to med3
fossil-db (Navi):
Totals from 241 (0.18% of 137413) affected shaders:
CodeSize: 856280 -> 856308 (+0.00%); split: -0.00%, +0.00%
Instrs: 164220 -> 164514 (+0.18%); split: -0.00%, +0.18%
Cycles: 1031916 -> 1033092 (+0.11%); split: -0.00%, +0.11%
VMEM: 77855 -> 78514 (+0.85%); split: +0.85%, -0.01%
SMEM: 20501 -> 20593 (+0.45%); split: +0.46%, -0.01%
Copies: 9791 -> 9790 (-0.01%); split: -0.03%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7045>
(cherry picked from commit d4c821da0e)
2020-11-13 10:05:41 -08:00
Vinson Lee
cdb5bcc059 turnip: Fix file descriptor return.
Fix defect reported by Coverity Scan.

Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach the expression -1 inside this statement: return ret ? -1 : handle.fd;

Fixes: cec0bc73e5 ("turnip: rework fences to use syncobjs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7498>
(cherry picked from commit dad6b62576)
2020-11-13 10:05:41 -08:00
Eric Anholt
0724abde7a gallium/draw: Fix rasterizer_discard for wide points/lines.
Fixes the rasterizer_discard failures for softpipe, because the wide paths
(which we hit for points in the CTS) were dropping the discard state when
making the no_cull shadow state.

Cc: mesa-stable
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7558>
(cherry picked from commit 0b4825c872)
2020-11-13 10:05:40 -08:00
Brendan Dougherty
0e3bb4aa91 mesa: Fix vertex_format_to_pipe_format index.
Corrects the index into the vertex_formats table for `integer` and
`normalized` values other than 0 or 1.

Fixes: e6448f993b ("mesa: translate into gallium vertex formats in mesa/main")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7554>
(cherry picked from commit 9edb6e1be0)
2020-11-13 10:05:40 -08:00
Marcin Ślusarz
7762b3cda4 nir: handle float atomics in copy propagation pass
Without this patch, copy propagation pass can optimize out
buffer loads out of compare & swap loop, which then leads
to infinite loop.

Triggered by a change to atomicCompSwap float test in piglit.

Fixes: 8424cd8fbd ("nir: Account for atomics in copy propagation.")
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7538>
(cherry picked from commit 6e6dab4799)
2020-11-13 10:05:39 -08:00
Jason Ekstrand
fe8c524c82 intel/fs: Fix use of undefined value in fixup_nomask_control_flow
Fixes: a8ac0bd759 "intel/fs/gen12: Workaround unwanted SEND execution..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7536>
(cherry picked from commit e9caba6ce5)
2020-11-13 10:05:39 -08:00
Dave Airlie
a442fc2955 llvmpipe: just use draw_regions in draw/line setup.
This fixes:
dEQP-VK.draw.scissor*

Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
(cherry picked from commit d186766c08)
2020-11-13 10:05:38 -08:00
Dave Airlie
bc3e92a1df lavapipe: disable SNORM blending for now
dEQP-VK.pipeline.blend.dual_source.format.r16g16b16a16_snorm.states.color_1msc_1ms1a_add_alpha_1mdc_1msa_sub-color_dc_1ms1c_rsub_alpha_z_1mdc_sub-color_ca_1ms1c_min_alpha_sas_ca_rsub-color_1ms1c_s1c_add_alpha_z_1mda_add,Fail
dEQP-VK.pipeline.blend.dual_source.format.r8g8_snorm.states.color_z_sc_add_alpha_1ms1c_sa_min-color_dc_1mca_add_alpha_z_1mca_max-color_1ms1c_sa_max_alpha_1mcc_sc_sub-color_s1c_1mda_add_alpha_s1c_1mda_add,Fail
dEQP-VK.pipeline.blend.dual_source.format.r8g8b8a8_snorm.states.color_1msc_1ms1a_add_alpha_1mdc_1msa_sub-color_dc_1ms1c_rsub_alpha_z_1mdc_sub-color_ca_1ms1c_min_alpha_sas_ca_rsub-color_1ms1c_s1c_add_alpha_z_1mda_add,Fail
dEQP-VK.pipeline.blend.dual_source.format.r8g8b8a8_snorm.states.color_z_sc_add_alpha_1ms1c_sa_min-color_dc_1mca_add_alpha_z_1mca_max-color_1ms1c_sa_max_alpha_1mcc_sc_sub-color_s1c_1mda_add_alpha_s1c_1mda_add,Fail
dEQP-VK.pipeline.blend.format.r16g16b16a16_snorm.states.color_ca_1mca_rsub_alpha_1mda_z_sub-color_sc_sc_add_alpha_1mca_sa_max-color_sa_1msa_min_alpha_1msc_sa_sub-color_dc_sc_add_alpha_1mdc_1mca_add,Fail
dEQP-VK.pipeline.blend.format.r8g8b8a8_snorm.states.color_ca_1mca_rsub_alpha_1mda_z_sub-color_sc_sc_add_alpha_1mca_sa_max-color_sa_1msa_min_alpha_1msc_sa_sub-color_dc_sc_add_alpha_1mdc_1mca_add,Fail

All fail due to the 1 - mdc or 1 - mca alpha channel in the last quadrant.

Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
(cherry picked from commit 01c4bac36e)
2020-11-13 10:05:37 -08:00
Dave Airlie
0e4e0a0d09 lavapipe: enable alpha to one.
CTS seems fine with this.

Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
(cherry picked from commit a04a146560)
2020-11-13 10:05:37 -08:00
Dave Airlie
3ee324d4ec u_blitter: port radv 3D blit coords logic.
The current code fails a lot of VK CTS tests, this fixes them all:
dEQP-VK*blit_image*3d*

Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
(cherry picked from commit ea034c981b)
2020-11-13 10:05:36 -08:00
Dave Airlie
4de4f55228 gallium: handle empty cbuf slots in framebuffer samples helper
If we have cbufs but they are all empty, default
to returning the fb->samples.

Fixes:
dEQP-VK.pipeline.multisample.mixed_count.1_4_unused
on lavapipe

v2:
drop unneeded chunk (Roland)

Cc: 20.3 <mesa-stable>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7499>
(cherry picked from commit 4b1d23b243)
2020-11-13 10:05:35 -08:00
Eric Anholt
f4d976d591 util/set: Fix the _mesa_set_clear function to not leave tombstones.
This implementation was broken and should have just been the same as the
hash_table_clear() one, which I copied over here.  It was setting all
formerly-present entries to deleted, yet also setting deleted_entries to
0.  This meant that all new searches or additions after clearing would
have to reprobe the whole table until a rehash happened, and that rehash
would be delayed because we violated the deleted_entries invariant.

No statistically significant performance difference on softpipe
KHR-GL33.texture_swizzle.functional runtime (n=18)

Fixes: 5c075b0855 ("util/set: add a set_clear function")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7244>
(cherry picked from commit 2afdd94f86)
2020-11-13 10:05:35 -08:00
Rob Clark
966b55c6da freedreno: Protect gmem_cache ralloc allocations
Since the ralloc context for cache_key allocation is shared between all
the contexts hanging off a screen, we need to allocate the key under the
screen->lock.

Fixes: 91f9bb99c5 ("freedreno: add gmem state cache")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>
(cherry picked from commit cb034ae44f)
2020-11-13 10:05:34 -08:00
Marek Olšák
60ffcfe6a9 st/mesa: fix use-after-free when updating shader info in st_link_nir
Fixes: 549ae5f8 "st/mesa: make sure prog->info is up to date for NIR (v2)"

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3756
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3685

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7516>
(cherry picked from commit 0d007349f9)
2020-11-13 10:05:34 -08:00
Erik Faye-Lund
46c08b73de softpipe: correct signature of get_compiler_options
This gets rid of a harmless but annoying compiler warning on MSVC.

Fixes: 73bafb5ee3 ("gallium: s/unsigned/enum pipe_shader_type/ for get_compiler_options()")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7524>
(cherry picked from commit 7a1346b26a)
2020-11-13 10:05:33 -08:00
Boris Brezillon
23f4120491 panfrost: Fix ->reads_frag_coord assignment
Let's assign ->reads_frag_coord only once to handle the sysval case
(used on Bifrost) correctly.

Fixes: f1de952b69 ("panfrost: Use shader_info harder")
Cc: 20.3 <mesa-stable>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7527>
(cherry picked from commit f23574af2c)
2020-11-13 10:05:33 -08:00
Boris Brezillon
f3ff1265ba panfrost: Fix Bifrost blend descriptor emission
Format conversion only works if the num_comps field is set to 4,
probably because the tile buffer always store those 4 components
internally.

Fixes: edd98aac3f ("panfrost: Add support for native wallpapering on Bifrost")
Fixes: 8389976b7c ("panfrost: XML-ify the blend descriptors")
Cc: 20.3 <mesa-stable>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7527>
(cherry picked from commit 35ae9408f2)
2020-11-13 10:05:32 -08:00
Alyssa Rosenzweig
5c167e8d92 pan/bi: Model writemasks correctly
We don't handle partial write masks in the backend yet, so for now we
can't pretend we do, else we'll have RA bugs. Fixes

dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_dst_alpha

Fixes: b2c6cf2b6d ("pan/bi: Eliminate writemasks in the IR")
Cc: 20.3 <mesa-stable>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7527>
(cherry picked from commit 7737ca7539)
2020-11-13 10:05:32 -08:00
Icecream95
2940fb13eb panfrost: Fix AFBC blits of resources with faked RGTC
Because u_transfer_helper changes resources back from the real format
to the emulated format after creation, we need to fix the format enum
for resources with fake compression when doing blits to/from AFBC.

Fixes: acb8dcfebd ("panfrost: Choose AFBC when available")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7400>
(cherry picked from commit 44f2de5286)
2020-11-13 10:05:31 -08:00
Anuj Phogat
3c4e43e72b intel: Pointer to SCISSOR_RECT array should be 64B aligned
v2: Apply the workaround to all gen hardawre

Ref: GEN:BUG:1409725701
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7463>
2020-11-09 21:29:04 +00:00
Arcady Goldmints-Orlov
a1a365e818 broadcom/compiler: Allow spills of temporaries from TMU reads
Since spills and fills use the TMU, special care has to be taken to
avoid putting one between a TMU setup instruction and the corresponding
reads or writes. This change adds logic to move fills up and move spills
down to avoid interrupting such sequences.

This allows compiling 6 more programs from shader-db. Other stats:

total spills in shared programs: 446 -> 446 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 606 -> 610 (0.66%)
fills in affected programs: 38 -> 42 (10.53%)
helped: 0
HURT: 2

total instructions in shared programs: 19330 -> 19363 (0.17%)
instructions in affected programs: 3299 -> 3332 (1.00%)
helped: 0
HURT: 5

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6606>
2020-11-09 20:45:58 +00:00
Samuel Pitoiset
1c5271346a nir/algebraic: optimize bitfield_select(a, b, 0) to iand(a, b)
(src0 & src1) | (~src0 & src2) to (src0 & src1).

fossils-db (Polaris10):
Totals from 873 (0.63% of 138014) affected shaders:
SGPRs: 33781 -> 33733 (-0.14%)
VGPRs: 37704 -> 37520 (-0.49%); split: -0.51%, +0.02%
CodeSize: 3861460 -> 3853424 (-0.21%); split: -0.21%, +0.00%
MaxWaves: 5306 -> 5305 (-0.02%)
Instrs: 743798 -> 743486 (-0.04%); split: -0.04%, +0.00%
Cycles: 10962244 -> 10960936 (-0.01%); split: -0.01%, +0.00%
VMEM: 128309 -> 128350 (+0.03%); split: +0.33%, -0.30%
SMEM: 44797 -> 44113 (-1.53%); split: +0.02%, -1.54%
Copies: 71875 -> 71674 (-0.28%); split: -0.31%, +0.03%
PreSGPRs: 23484 -> 23479 (-0.02%)
PreVGPRs: 34582 -> 34529 (-0.15%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7479>
2020-11-09 19:51:27 +00:00
Boris Brezillon
d47969eb5e pan/bi: Add support for load_instance_id
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
5cd1d8c1ed pan/bi: Add support for load_vertex_id
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
255f7842c7 panfrost: Allow linear ZS resources on Bifrost
Linear Z/S buffers should be handled correctly now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
4995a4c03a pan/bi: Add support for ushr
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
af70987b36 pan/bi: Add support for ishr
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
3257ad21f3 pan/bi: Fix ARSHIFT definitions
src1 exists, and must be set to ZERO. If we don't add this source,
lane2 refers to src2 which does not exists.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
2a80b2d0cd pan/bi: Move bitwise op packing out of bi_pack_fma()
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
cc0950722c pan/bi: Get rid of bi_emit_ld_uniform()
Now that we lower uniforms to UBO we can get rid of bi_emit_ld_uniform().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
fd265fa020 pan/bi: Lower uniforms to UBO
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
09da82cbdc pan/bi: Add support for load_ubo
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
87e2169cb9 pan/bi: Fix swizzle handling in bi_copy_src()
The number of src swizzle to initialize depends on the number of source
properties (size and number of components) not the destination ones.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
2522f509a3 pan/bi: Support centroid and sample interpolations
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
ca5a00a70c pan/bi: Extract LD_VAR sample field from ins->load_vary.interp_mode
So we can extend bi_emit_ld_vary() to support centroid and sample modes.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
1692088d05 panfrost: Expose GLES3 features on Bifrost when PAN_MESA_DEBUG=deqp
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>
2020-11-09 20:36:50 +01:00
Boris Brezillon
23dbf7964b panfrost: Force late pixel kill when depth/stencil is written from the FS
If we don't do that, pixels might be killed early thus preventing the
fragment shader from being called and updating the depth/stencil value.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7501>
2020-11-09 19:23:41 +00:00
SureshGuttula
956228da3a radeon/vcn : Corrected dpb_size calculation for VP9_2
Currently dpb_size for VP9 profile0 and profile2 is same eventhough
for profile2 dpb_size is  multiplied by extra 3/2 and we are
seeing VM_L2_PROTECTION_FAULT error and ring vcn_dec timeout because
of less dpb_size for VP9_2.

This patch will correct dpb_size for VP9_2 and fixes the issue.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7480>
2020-11-09 19:14:22 +00:00
Jason Ekstrand
68092df8d8 intel/nir: Lower 8-bit ops to 16-bit in NIR on Gen11+
Intel hardware supports 8-bit arithmetic but it's tricky and annoying:

  - Byte operations don't actually execute with a byte type.  The
    execution type for byte operations is actually word.  (I don't know
    if this has implications for the HW implementation.  Probably?)

  - Destinations are required to be strided out to at least the
    execution type size.  This means that B-type operations always have
    a stride of at least 2.  This means wreaks havoc on the back-end in
    multiple ways.

  - Thanks to the strided destination, we don't actually save register
    space by storing things in bytes.  We could, in theory, interleave
    two byte values into a single 2B-strided register but that's both a
    pain for RA and would lead to piles of false dependencies pre-Gen12
    and on Gen12+, we'd need some significant improvements to the SWSB
    pass.

  - Also thanks to the strided destination, all byte writes are treated
    as partial writes by the back-end and we don't know how to copy-prop
    them.

  - On Gen11, they added a new hardware restriction that byte types
    aren't allowed in the 2nd and 3rd sources of instructions.  This
    means that we have to emit B->W conversions all over to resolve
    things.  If we emit said conversions in NIR, instead, there's a
    chance NIR can get rid of some of them for us.

We can get rid of a lot of this pain by just asking NIR to get rid of
8-bit arithmetic for us.  It may lead to a few more conversions in some
cases but having back-end copy-prop actually work is probably a bigger
bonus.  There is still a bit we have to handle in the back-end.  In
particular, basic MOVs and conversions because 8-bit load/store ops
still require 8-bit types.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
2020-11-09 18:58:51 +00:00
Jason Ekstrand
b98f0d3d7c intel/nir: Lower 8-bit scan/reduce ops to 16-bit
We can't really support these directly on any platform.  May as well let
NIR lower them.  The NIR lowering is potentially one more instruction
for scan/reduce ops thanks to not being able to do the B->W conversion
as part of SEL_EXEC.  For imax/imin exclusive scan, it's yet another
instruction thanks to the extra imax/imin NIR has to insert to deal with
the fact that the first live channel will contain the identity value
which, when signed, will cast wrong.  However, it does let us drop some
complexity from our back-end so it's probably worth it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
2020-11-09 18:58:51 +00:00