Commit graph

5735 commits

Author SHA1 Message Date
Marcin Ślusarz
a777b25350 intel/perf: export performance counters sorted by [group|set] and name
It's a lot easier to deal with them in RenderDoc when they are
in some meaningful order.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
2020-08-10 13:41:29 +00:00
Marcin Ślusarz
59716e40b0 intel/perf: split load_oa_metrics
Move oa_metrics_available out of load_oa_metrics and call
build_unique_counter_list outside.

This change is a preparation for the next patch. It should
not have any functional impact.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
2020-08-10 13:41:29 +00:00
Marcin Ślusarz
2fbab5a1b3 intel/perf: fix performance counters availability after glFinish
Currently Linux kernel gathers performance counters at fixed
intervals (~5-10ms), so if application uses AMD_performance_monitor
extension and immediately after glFinish() asks GL driver for HW
performance counter values it might not get any data (values == 0).

Fix this by moving the "read counters from kernel" code from
"is query ready" to "get counter values" callback with a loop around
it. Unfortunately it means that the "read counters from kernel"
code can spin for up to 10ms.

Ideally kernel should gather performance counters whenever we ask
it for counter values, but for now we have deal with what we have.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
2020-08-10 13:41:29 +00:00
Marcin Ślusarz
9fa64803aa intel/perf: streamline error handling in read_oa_samples_until
No functional changes.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
2020-08-10 13:41:29 +00:00
Marcin Ślusarz
03e8b3551c intel/perf: fix how pipeline stats are stored
It matters only when counters are not ordered by offset.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
2020-08-10 13:41:29 +00:00
Marcin Ślusarz
e7e6f70938 intel/perf: fix calculation of used counter space
It matters only when counters are not ordered by offset.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
2020-08-10 13:41:29 +00:00
Lionel Landwerlin
d83be29a53 intel/dump_gpu: add an option to capture a single frame
We use the driver identifier buffer to get the information about the
current frame.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
a6a5b0e52e intel/dump_gpu: fix --platform option
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
9f0db069d3 anv: track the current frame and write it into the driver identifier BO
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
42cb068d9f intel/dump_gpu: only map in GTT buffers not previously mapped
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
22b512ea5b intel/dump_gpu: add an only-capture option
This option allows for smaller aub files to be generated by only
storing the BOs flagged with EXEC_OBJECT_CAPTURE.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
f0e13827aa intel/dump_gpu: set default device_override
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
c4bfa6dfbb intel/dump_gpu: further track mapping of BOs
We can go further in tracking what BOs are written to by the driver by
tracking when a buffer in unmapped. A BO could be mmap, written, unmap
and never be written to again. In such case we can just write the BO's
content on the first exec buf after unmap and never write it again.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
63c90acc9e intel/dump_gpu: only write BOs mapped by the driver
Track what BOs are mapped by the driver and only write those. We can
safely assume that when not mapped there is no data to save.

v2: Don't forget to return the ret (Rafael)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
2020-08-07 11:27:54 +00:00
Lionel Landwerlin
b43bcb05a1 anv: fix incorrect realloc failure handling
We don't want to leak in case of failure.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Ivan Briano <ivan.briano@intel.com>
Fixes: 246261f0ad ("anv: prepare the driver for delayed submissions")
Fixes: 34f32a6d66 ("anv: implement VK_KHR_timeline_semaphore")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6200>
2020-08-06 23:07:56 +00:00
Jason Ekstrand
7f06d194fd anv: Advertise shaderIntegerFunctions2
We advertised the extension string but never the feature bit.  Doh!

Fixes: c57338b924 "anv: Enable SPV_INTEL_shader_integer_functions2..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6033>
2020-08-06 16:14:16 +00:00
Kristian H. Kristensen
6b3f56f099 anv: Add stub for anv_gem_get_tiling() for Android
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Kristian H. Kristensen
ff0dbf2096 anv: Pass device to setup_gralloc0_usage for error reporting
Otherwise it doesn't compile.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: aba57b11ee ("anv: support GetSwapchainGrallocUsage2ANDROID for Android")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6112>
2020-08-05 18:08:07 +00:00
Iván Briano
d33f46e08b anv: fix allocation of custom border color pool
Turns out that respecting the order of parameters is important.

Reported-by: Michael Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 5425968d2e ("anv: Implement VK_EXT_custom_border_color")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6175>
2020-08-04 15:30:33 -07:00
Eric Anholt
023e6669cc i965: Enable vector shrinking in the vec4 backend.
This manages to make some extra vec operations that would turn into movs
go away.

brw shader-db:
total instructions in shared programs: 3895037 -> 3893221 (-0.05%)
total cycles in shared programs: 113832759 -> 113792154 (-0.04%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>
2020-08-03 21:26:45 +00:00
Jason Ekstrand
3c2a1af660 anv: Implement VK_EXT_4444_formats
We only support the ARGB format, not the ABGR one.  Fortunately, the
ARGB is the one required by D3D11.

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6158>
2020-08-03 17:50:03 +00:00
Tapani Pälli
32e0f7e097 anv: toggle on VK_EXT_extended_dynamic_state
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
b9a05447a1 anv: dynamic vertex input binding stride and size support
If pStrides or Psizes are NULL we should use the values defined by the
pipeline.

v2: fix commit message and fix the code to set explicitly if we are
    using dynamic stride/size

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
e4590c0750 anv: depth/stencil dynamic state support
v2: code cleanup, remove extra spaces (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
f6fa4a8000 anv: add support for dynamic primitive topology change
This is done using 3DSTATE_VF_TOPOLOGY packet that overrides topology
used in subsequent 3DPRIMITIVE commands. For gen7[5] we override the
pipeline topology when emitting draw commands.

v2: fix the way gen7[5] is handled (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
f426663f9c anv: add support for dynamic viewport and scissor with count
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
9220598b36 anv: add support for dynamic cull mode and winding order
v2: cleanup, white space issues (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
c34d8ac26e anv: handle dynamic viewport count
Emit 3DSTATE_CLIP during cmd_buffer_flush_state so that we can change
the max viewport count dynamically.

v2: use one common clip state as size is the same for all gens (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
11f3fb9a4e anv: consider dynamic state when creating pipeline
Leave default state values as zero so that when we OR them later
it is only the dynamic state value that matters.

v2: code cleanup + skip topology emit in base batch
    when topology is dynamic (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
65de778e0b anv: add new dynamic states
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Tapani Pälli
2260ce6d0c anv: add VK_EXT_extended_dynamic_state but leave it disabled
This is needed to ensure the function prototypes are declared.

v2: tweak commit message (Jason)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>
2020-08-02 17:44:54 +00:00
Matt Turner
eaf27eb512 intel/tools: Test notification subregisters
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
ac7ecd205b intel/tools: Simplify notification register handling
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
63181df09b intel/tools: Don't hardcode notification register
Previously we parsed a src non-terminal but did nothing with it. Since
the WAIT instruction is kind of weird, in that you have to give it the
same notification subregister for both destination and source, and it
always has an exec size of 1, let's parse a destination instead of a
source. This way, we can parse a writemask rather than a swizzle in
align16 mode, and easily convert the writemask to a swizzle to create
the source register.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
90c18ec8db intel/tools: Manually set ARF register file/nr/subnr
brw_reg::subnr is in bytes, like the subnr field in the instruction
word, but we disassemble the subregister number in units of the type.
For example g0.3<1>F would have a subnr=12.

These non-terminals produce a brw_reg and feed into other non-terminals
that call brw_reg(), where they are passed the subnr that we set here.
brw_reg()'s subnr parameter is expected to be in terms of the register
type, and it is multiplied by the type size to calculate the subnr in
bytes.

In these non-terminals, we don't know the register type yet, so we
must store the subregister number as it was given to us in the .subnr
field and let the brw_reg() constructor handle the conversion to the
canonical byte-based subnr form when it knows the type.

Before this patch, subregister numbers applied to these registers would
be multiplied with the type size twice.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
af6d6f5c43 intel/tools: Pass integers, not enums, to stride()
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
c883c482be intel/compiler: Relax SENDS regioning assertions
The next commit fixes a mistake in the assembler and ends up running
afoul of this assertion.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
363e5ef5a5 intel/tools: Simplify dstregion
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
3d9c673c0f intel/tools: Simplify immediate handling
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
59801f07e7 intel/tools: Make writemask an integer
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
e115c499da intel/tools: Make swizzle an integer
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
3e1602cc4f intel/tools: Simplify register type handling
Produce a brw_reg_type rather than a whole brw_reg and rename a few
non-terminals.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
2851c218e2 intel/tools: Don't allow empty type specifier
It's preferable to require an explicit type.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
6809b93411 intel/tools: Remove stray newline
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
Matt Turner
fdfbb1ed26 intel/tools: Fix typos
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
2020-07-31 12:59:24 -07:00
David Stevens
6c11a7994d i965/i915: Add colorspace support to YUV sampling
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6122>
2020-07-31 07:27:03 +00:00
Boris Brezillon
025988f818 intel: Set int64_options to ~0 when lowering 64b ops
That's more future proof than setting each bit manually. Looks like we
already miss nir_lower_ufind_msb64 because of that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
2020-07-30 16:54:24 +00:00
Boris Brezillon
bfee35b45c nir: Stop passing an options arg to nir_lower_int64()
This information is exposed through shader->options->lower_int64_options.
Removing the extra arg forces drivers to initialize this field correctly.

This also allows us to check the int64 lowering options from each int64
lowering helper and decide if we should lower the instructions we
introduce.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5588>
2020-07-30 16:54:24 +00:00
Marcin Ślusarz
cb19fe24d3 intel/vec4: fix out of bounds read
NIR_MAX_VEC_COMPONENTS was bumped from 4 to 16 in a8ec4082
(2019.03.09, merged 2019.12.21)

float[4] array was added in acd7796a
(2019.06.11, merged 2019.07.11)

Found by Coverity.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3014

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Fixes: a8ec4082a4 ("nir+vtn: vec8+vec16 support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6067>
2020-07-30 10:41:00 +00:00
Alejandro Piñeiro
62bfc700f7 vulkan/util: add struct vk_pipeline_cache_header
Header is defined at vkGetPipelineCacheData spec, in any vulkan
version, and anv, tu and radv were using the same struct, and v3dv was
about to do the same.

Defining the same struct four times seemed odd, so let's define on a
common place.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6058>
2020-07-30 11:44:21 +02:00