We always pass SI_OP_SYNC_BEFORE to barriers, which makes it redundant.
If we don't want to sync "before", we just won't call
si_barrier_before_internal_op.
This makes the flags parameter unused in si_barrier_before_internal_op.
It might be used for something else in the future. All places now pass 0
to it.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
The shader busy-waits until the query results are written, but that only
synchronizes for src. The destination buffer might also be used by previous
shaders, so we should wait until all shaders are idle. This might fix some
issues.
The missing si_mark_atom_dirty fix should have no effect, but all flags
changes should call it to be consistent.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
All places that call si_barrier_after_internal_op also set SI_OP_SYNC_AFTER,
so we can do the sync unconditionally.
If we want to skip the "after" sync in the future, we just won't call
si_barrier_after_internal_op.
CP DMA is the only one that will sync even without
si_barrier_after_internal_op, but CP DMA ops are usually small and almost
never used on GFX10+.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
The only remaining use had no effect because it doesn't call
si_barrier_before_internal_op at all and instead implements its own
barrier.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
It has only one use. The barriers didn't do anything because the caller
doesn't set any flags and implements its own barrier.
This is part of trying to push the barrier logic outside the functions
that implement internal ops.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
Test suites even with AMD_DEBUG=mono didn't catch this.
Fixes: b7136d0890 - radeonsi: pass TCS inputs_read mask to LS output lowering on GFX9 + monolithic
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
It was incorrectly assumed that CP DMA is never used.
Fixes: c90d4e0d57 - radeonsi/gfx12: remove CP DMA workarounds because CP DMA is never used on gfx12
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31082>
Framework mostly copied from radeonsi...
The only change is the firefox override, which was not working anyway,
since firefox seems to no longer load mesa in the main process, so just
remove it.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30860>
Disable aysnc mapping in case we are updating a external memobj.
Fixes following Piglit tests:
spec@ext_external_objects@vk-pix-buf-update-errors
spec@ext_external_objects@vk-vert-buf-update-errors
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29303>
Latency is hooked up to a new winsys framebuffer interface method. Swap
interval replaces the previous environment variable. This does make the
environment variable lowercase but that seems worth the break to be able
to set it from driconf.
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31157>
The extension only affects non semantic instructions that need no
handling in the backend compiler.
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30791>
This fix doesn't concern CDNA based chips such as gfx940 directly
but it fixes corruptions on other chips that use emulated image
loads and stores using buffers when AMD_IMAGE_OPCODES=false.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30891>
This is useless and causes hangs (eg: with Firefox).
Instead use a custom emit function for the sqtt state, and
add the pipeline BO to the buffer list at this point.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31171>
This was only a best effort fallback and it doesn't always work.
Driver is expected to only output slice NALs when packed headers
are not enabled, so let's just do that.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31126>
Some apps would default to smaller resolutions than we currently report
as supported, despite the hardware being able to encode it. It's also
common for test apps/suites to use small resolutions.
libva-utils/h264encode uses 176x144 resolution by default and vulkan cts
have video clips with the same resolution too which would previously
fail to encode.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31109>
We want barriers to only consider compute as a possibility, and CP DMA
has to work with that, which means barriers can't have code specific
to CP DMA.
Always executing the CP DMA sync seems acceptable because CP DMA operations
are usually small, and CP DMA is almost never used on GFX10+.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
This makes the CP DMA code simpler and reuses the logic we use for internal
compute shaders.
The only thing that can't be handled in the barrier functions is
"!cp_dma_has_L2 -> SI_CONTEXT_INV_L2" because the barrier functions should
assume that only compute shader coherency is required to make them usable
everywhere, and the CP DMA code has to deal with it.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
We don't need to access GDS with CP DMA, and L2 prefetches don't use this
codepath.
Some local variables are also moved closer to their use.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
Since the compute blit can execute multiple dispatches in a loop,
we shouldn't save/bind/restore images for every single dispatch.
This will help move that out of the loop.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
