Commit graph

214051 commits

Author SHA1 Message Date
Karol Herbst
263e1823d2 st/interop: fix fence leak
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14050
Fixes: 1396dc1c38 ("mesa/st, dri2, wgl, glx: Modify flush_objects interop func to export a fence_fd")
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
(cherry picked from commit 87550fc657)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-13 08:10:19 -08:00
Faith Ekstrand
e334938384 nil: Add support for Blackwell 8 and 16-bit modifiers
Backport-to: 25.2
Reviewed-by: James Jones <jajones@nvidia.com>
(cherry picked from commit f1cb63a21d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-13 08:10:18 -08:00
Faith Ekstrand
f299249d8b drm-uapi: Import the new NVIDIA modifiers
Imported from kernel commit eef295a850820 of drm-misc-fixes

Backport-to: 25.2
Reviewed-by: James Jones <jajones@nvidia.com>
(cherry picked from commit 3247452b2c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-13 08:10:17 -08:00
Sagar Ghuge
594ae17ec9 anv: Drop unwanted untyped flush for AS query
CmdWriteAccelerationStructuresPropertiesKHR writes the data with MI
commands, we no longer dispatch shaders to write the properties.
As a result, we don't need to flush untyped cache.

Fixes: f0e18c475b ("intel: remove GRL/intel-clc")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 14194e59a4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-13 08:10:15 -08:00
Benjamin Cheng
02ba16ec03 radv/video: Fix dummy DPB addresses
This fixes the VVL PositiveVideoDecodeAV1.* tests, which trigger error
concealment. These DPB addresses would not be normally used, but get
used by the error concealment path.

Fixes: d103b76ad6 ("radv/video: add VK_KHR_video_decode_av1 support.")
Reviewed-by: David Rosca <david.rosca@amd.com>
(cherry picked from commit 82d944b388)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-13 08:10:14 -08:00
Lars-Ivar Hesselberg Simonsen
1460a0319f panvk: Fix IUB decode
The base address used for bounds checking the entry was wrong. Directly
pass the end_of_entry address instead.

Fixes: db4bcd48d7 ("panvk: Fix IUB decode")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
(cherry picked from commit 89293120f0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-13 08:10:09 -08:00
Dylan Baker
d48e4a3f3b .pick_status.json: Update to 294e72e2b5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-13 08:10:00 -08:00
Christian Gmeiner
d3d820d6ef anv: Fix needs_temp_copy() incorrectly matching depth/stencil formats
The needs_temp_copy() function was incorrectly identifying some
depth/stencil formats as needing RGB<->RGBA conversion.

VK_FORMAT_D32_SFLOAT_S8_UINT maps to PIPE_FORMAT_Z32_FLOAT_S8X24_UINT,
which has 3 channels (F32 depth, UP8 stencil, X24 padding). The
component count check (== 3) was matching this as an RGB color format,
causing depth/stencil images to incorrectly use the RGB conversion path.

Add an explicit vk_format_is_depth_or_stencil() check before the
component count test to ensure depth/stencil formats always use the
direct copy path.

Fixes: f97b51186f ("anv: intermediate RGB <-> RGBX copy for HIC")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 0be53b2ed8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:55 -08:00
Mario Kleiner
70e3af188d wsi/display: Allow atomic modeset for change of Colorspace or HDR poperties
At least some drivers need a full modeset to change the Colorspace
property or to en-/disable HDR mode. E.g., at least amdgpu-kms as
tested under Linux 6.8 on Polaris needs it. Otherwise the atomic
commit for disabling HDR in _wsi_display_cleanup_state() will fail,
and the connector stays stuck in HDR mode after vkDestroySwapchainKHR().

Fixes: 1ed78dd7ec ("wsi/display: Clean up DRM hdr/color state on swapchain destruction")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Autumn Ashton <misyl@froggi.es>
(cherry picked from commit ba82d36dce)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:55 -08:00
Mario Kleiner
b777384e99 wsi/display: Initially set default HDR metadata from EDID for HDR modes
For a selected non-default imageColorSpace during swapchain creation,
make sure that proper HDR setup also works even if a client app does not
explicitly call vkSetHdrMetadataEXT() in time.

Assign the EDID provided metadata here, so the 1st atomic commit will
set Colorspace and HDR metadata properties on the connector, to make sure
HDR or other wide color gamut modes get enabled.

Without this, the chain->color_outcome_serial would stay at zero and
the properties would not ever get assigned during drm_atomic_commit(),
leaving HDR disabled on the display sink.

Fixes: 13137393f6 ("wsi/display: Expose HDR10 colorspace based on EDID")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Autumn Ashton <misyl@froggi.es>
(cherry picked from commit 19b2e3b81b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:54 -08:00
Mario Kleiner
c4e0f4d917 wsi/display: Accept 0 nits for HDR light level properties for "undefined"
CTA-861-G section 6.9.1 Static Metadata Type 1 declares that zero values
for different groups of HDR Metadata properties are allowed, including
zero nits values for max display mastering luminance, max content light
level, max frame-average light level and min display mastering luminance.

A zero value is meant to be treated by the video sink as "undefined" /
"unknown", and handled accordingly. This is common for dynamically
generated visual content.

Therefore don't assert on some minimum nits level > 0, but only check for
a non-negative level.

Fixes: b4176393a0 ("wsi/display: Implement VK_EXT_hdr_metadata on KHR_display swapchain")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Autumn Ashton <misyl@froggi.es>
(cherry picked from commit 19dc09aded)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:54 -08:00
Danylo Piliaiev
f3268818d5 tu: Use cmd->rp_trace u_trace for draw calls
Fixes: 707c97f634 ("tu: Add tracepoints around draws, with shader sha1s.")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
(cherry picked from commit c04e375588)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:53 -08:00
Yiwei Zhang
9e809986f6 panvk: fix mem alloc size for VkBuffer backed by imported blob AHB
For AHB VkBuffer import, the allocationSize comes from the raw external
AHB props query and it can be larger than the underlying buffer memory
requirement. So we must respect the allocationSize for the actual mem
import to support mapping the whole AHB size, and the dedicated buffer
info has to be stripped to obey the spec.

Test: CtsNativeHardwareTestCases no longer crashes on debug build panvk

Fixes: 66bbd9eec8 ("panvk: implement AHB image deferred init and memory alloc")
Tested-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
(cherry picked from commit 4ec2a921d3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:53 -08:00
Lionel Landwerlin
8a813632c3 vulkan/runtime: simplify robustness state hashing
We're doing the same in vk_pipeline_precomp_shader_create().

Also fixes valgrind warning due to uninitialized fields

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
(cherry picked from commit fc6d17a290)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:52 -08:00
Daniel Schürmann
b17381dc8d radv/null_device: set more options which affect compilation
Cc: mesa-stable
(cherry picked from commit 23ef756496)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:52 -08:00
David Rosca
7aa2c70759 radv/video: Add NULL checks for picture parameters
Fixes vk_layer_validation_tests PositiveVideoDecode.* and
PositiveVideoDecode*.InlineSessionParams

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit bd151bf8b2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:51 -08:00
David Rosca
11a4adec73 radv/video: Correctly handle no feedback query for encode
Fixes vk_layer_validation_tests PositiveVideoEncodeAV1.*

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit 23a3587aa6)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:50 -08:00
David Rosca
e21d417234 vulkan/video: Avoid NULL pointers in session parameters
Always copy parameters that are not guarded by a flag, zero init
the structs if not provided by application.

Fixes vk_layer_validation_tests PositiveVideoEncode*.GetEncodedSessionParams

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit 6a1c6ab95b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:50 -08:00
Benjamin Cheng
dafde3434a vulkan/video: NULL check codec-specific chain
It seems applications are allowed to do no-op updates by not passing any
codec-specific extension structures.

Cc: mesa-stable
Reviewed-by: David Rosca <david.rosca@amd.com>
(cherry picked from commit 4d22427079)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:49 -08:00
Timothy Arceri
38e258d5d4 mesa: skip redundant uniform update optimisation if unsafe
If multiple contexts are updating uniform values we can't assume
a uniform update can skip flushing.

Fixes: b32e20e630 ("mesa: skip redundant uniform updates for glUniformHandle")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14129

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 34db720660)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:48 -08:00
Lionel Landwerlin
478d92171d anv: avoid invalid timestamp generation due to skipped commands
We skip the stall emission for STATE_BASE_ADDRESS since this one can
be skipped on Gfx12.5+ and instead add a new sba tracepoint that has
valid timestamps.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0147908a89 ("anv: predicate emission of STATE_BASE_ADDRESS")
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
(cherry picked from commit cff047280a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:48 -08:00
Emma Anholt
96d959986c v3dv: Fix assertion failure for not-found primary_fd during enumeration.
Found when I had v3dv built in my aarch64 turnip setup.

Fixes: 451a0bd490 ("v3dv: use v3d primary node for VK_EXT_physical_device_drm")
(cherry picked from commit bb532a7a39)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:47 -08:00
Yiwei Zhang
c167b0a816 glcpp/meson: fix libglcpp generated header dependency
Explicitly declare glcpp-parse.h as a file dependency to ensure
glcpp_parse custom target completes before compiling glcpp-lex.c.

Cc: mesa-stable
(cherry picked from commit 53482178ef)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:47 -08:00
Lionel Landwerlin
ec8518d123 brw: avoid invalid URB messages
Some new CTS tests have geometry shader looking like this :

   void main()
   {
      gl_Position = gl_in[0].gl_Position;
      EmitVertex();
      EndPrimitive();
      // <-- some storage buffer write
   }

The generate shader has :
   - a message to write the position
   - a message to write to the storage buffer
   - a final message to end the thread

This generates an empty EOT URB messages which is apparently not legal
(simulation complains, HW hangs) :

send(8)         nullUD          g126UD          nullUD          0x04088007                0x00000000
                urb MsgDesc: offset 0 SIMD8 write masked  mlen 2 ex_mlen 0 rlen 0 { align1 1Q A@1 EOT };

Instead emit a write with actual data and the mask set at 0 to discard
the effect :

mov(8)          g127<1>UD       0x00000000UD                    { align1 WE_all 1Q };
mov(8)          g125<1>UD       0x00000000UD                    { align1 1Q };
send(8)         nullUD          g126UD          g125UD          0x04088007                0x00000040
                urb MsgDesc: offset 0 SIMD8 write masked  mlen 2 ex_mlen 1 rlen 0 { align1 1Q A@1 EOT };

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit ff57c31696)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:46 -08:00
Ian Romanick
269a6fe030 brw: Correctly generate conditional modifier for BFN
Fixes: 4193895145 ("brw/cmod: Enable limited cmod propagation for BFN")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 34fe598b39)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:46 -08:00
Georg Lehmann
4b46e87296 aco/gfx10_3: work around NSA hazard
4+ dword NSA can hang if exec becomes non-zero again directly before
the instruction.

Foz-DB Navi21:
Totals from 608 (0.74% of 82161) affected shaders:
Instrs: 945138 -> 946431 (+0.14%)
CodeSize: 5171580 -> 5176864 (+0.10%)
Latency: 13356895 -> 13357113 (+0.00%)
InvThroughput: 3043234 -> 3043236 (+0.00%); split: -0.00%, +0.00%

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9852
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13981
Cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
(cherry picked from commit b2172467d1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:45 -08:00
David Rosca
3f169d14d2 radv/video: Fix AV1 bidir compound encode with order_hint disabled
Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit bcb6e6b6e6)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:45 -08:00
David Rosca
3a63355583 radv/video: Don't require encode FW version >= interface version
Otherwise this breaks backwards compatibility when bumping interface
version for new features.

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit 96db490318)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:44 -08:00
David Rosca
7fb0030c06 radeonsi/vcn: Fix AV1 bidir compound encode with order_hint disabled
Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit 1a8a8db8c5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:44 -08:00
Yiwei Zhang
e96e71fb79 llvmpipe: misc fixes for sparse binding
This change:
1. Move size validation within sparse binding, but not escape to
   non-sparse code path.
2. Error out if sparse is requested on unsupported platforms.

Fixes: d747c4a874 ("lavapipe: Implement sparse buffers and images")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
(cherry picked from commit e0acc5c2b4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:43 -08:00
Yiwei Zhang
eface4be0d llvmpipe: add a missing alloc error handling in fd import
Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")
Suggested-by: Christian Gmeiner <cgmeiner@igalia.com>
(cherry picked from commit 66414c6b70)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:42 -08:00
Yiwei Zhang
36aff3454b llvmpipe: fix udmabuf mmap error check
Upon failing to mmap, MAP_FAILED (void *)-1 is returned instead of NULL.

Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
(cherry picked from commit 3e07f57d4a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:42 -08:00
Yiwei Zhang
3d9d9ca09b llvmpipe: zero is also a valid fd
Fixes: a062544d3d ("llvmpipe: Use an anonymous file for memory allocations")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
(cherry picked from commit 3a655c212b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:41 -08:00
Samuel Pitoiset
e817b525d8 radv,aco: wait for all VMEM loads when the prolog loads large 64-bit attributes
Not the most optimal solution but 64-bit vertex attributes are rarely
used. Could still revisit if we find a real use case that matters.

This fixes recent VKCTS coverage:

dEQP-VK.pipeline.fast_linked_library.vertex_input.component_mismatch.r64g64b64.*_to_dvec2
dEQP-VK.pipeline.shader_object_.*.vertex_input.component_mismatch.r64g64b64.*_to_dvec2

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14243
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit a0d607bfdb)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:41 -08:00
Samuel Pitoiset
8eec239517 aco: fix reserving VGPRs for 64-bit attributes in VS prologs
Otherwise the fetch index would be overwritten if the attribute format
is 64-bit and more than 2 components are loaded.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14242
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit ba5bf81aa2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:40 -08:00
Sagar Ghuge
e9f677dff9 anv: Use correct engine class for companion RCS
Fixes: 6f138fe723 ("anv: avoid null pointer access in utrace copies on CCS")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 43d98a3f1a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:38 -08:00
Dylan Baker
4f5c1c6c75 .pick_status.json: Update to 04a0d512fa
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38432>
2025-11-07 08:14:36 -08:00
Dylan Baker
944ec88ca5 VERSION: bump for 25.3.0-rc4
Some checks failed
macOS-CI / macOS-CI (dri) (push) Has been cancelled
macOS-CI / macOS-CI (xlib) (push) Has been cancelled
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2025-11-06 09:02:18 -08:00
Georg Lehmann
7d4557bae8 radv: do not report wave32 in gl_SubgroupSize for Doom Dark Ages
Some checks failed
macOS-CI / macOS-CI (dri) (push) Has been cancelled
macOS-CI / macOS-CI (xlib) (push) Has been cancelled
The shaders in question use:

(memory_load + (gl_SubgroupSize - 1)) & ~(gl_SubgroupSize - 1)

My guess is that this is supposed to be the subgroup size of whatever
produced the value, not the subgroup size in this shader.
And because in the consumer the workgroup size is 32, we use wave32.

Fixes: a2d3cbac2a ("radv: determine subgroup/wave size early")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14187

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 83e9ae2d5c)

Conflicts:
	src/amd/vulkan/radv_instance.c
	src/amd/vulkan/radv_instance.h
	src/util/driconf.h

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-05 10:18:26 -08:00
Yiwei Zhang
4482281292 panvk: fix sample shading of internal blend shader for MSAA
Align with gallium side. When fixed-function blending is not available,
the internal blend shader is used. This is handled by a single ST_TILE
in the blend shader with the current sample ID, which requires sample
shading enablement.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
(cherry picked from commit 763d2418b8)

CI fails removed from cherry-pick as the file doesn't exist on stable,
and the main branch change has only removals.

Conflicts:
	src/panfrost/ci/panfrost-g925-fails.txt

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-05 10:16:55 -08:00
Connor Abbott
1dadb38d7b tu: Fix attachment stores with subpasses with partial views
Subpasses can have different view masks, although this isn't often used.
So we can't use the view mask of the last subpass when deciding what to
store, instead we have to use the same used_views field that's used by
loads and clears.

Noticed by upcoming tests for VK_QCOM_multiview_per_view_render_areas.

Cc: mesa-stable
(cherry picked from commit c0b5c04b84)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 14:12:21 -08:00
Connor Abbott
ef9457d119 tu: Rename tu_render_pass_attachment::clear_views to used_views
It's not just used for clears, it was already used for loads and it
needs to be used for stores too so clear_views was a confusing name.

Cc: mesa-stable
(cherry picked from commit 6c3ed74ed2)

Conflicts:
	src/freedreno/vulkan/tu_pass.cc
	src/freedreno/vulkan/tu_pass.h

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 14:12:20 -08:00
Lionel Landwerlin
9696921018 anv: avoid null pointer access in utrace copies on CCS
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3e0ad0176b ("anv: Emit state cache invalidation after every compute dispatch")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit 6f138fe723)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00
Lionel Landwerlin
30678337dd u_trace: reserve chunk space before emitting copies
Some implementations can emit tracepoints when copying u_trace
buffers. It's important to reserve the slots we want to copy into
before emitting the copies so that both processes don't clash with one
another.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
(cherry picked from commit df5f92d114)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00
Danylo Piliaiev
eb2668aad7 vulkan: Always fill DS state for EXT_dynamic_rendering_unused_attachments
If renderpass has D/S attachment, but pipeline has D/S as UNDEFINED,
D/S should be properly disabled for the pipeline. The easiest way is to
ensure that D/S state is valid when pipeline's D/S format is UNDEFINED.
So we always create VkPipelineDepthStencilStateCreateInfo.

CC: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
(cherry picked from commit 2798ef7bfd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00
Ryan Houdek
e23c722170 freedreno/fdl: Fix typo in tiled_to_linear_2cpp
The non-aarch64 path was copying in the wrong direction.

Fixes: 7a5a33e0e3 ("freedreno/fdl: Add tiling/untiling implementation for a6xx/a7xx")
(cherry picked from commit 455eb2c751)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00
Mel Henning
2ad12150e8 nak/opt_lop: Don't handle modifiers in dedup_srcs
The handling in dedup_srcs was incorrect because it would apply the
modifier from srcs[i] to the LUT without removing the modifier from the
instruction. We can fix and simplify this code by removing all modifiers
before the dedup_srcs() call, which we were doing immediately after the
call anyway.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13966
Fixes: 66c9c40f68 ("nak: Handle modifiers in dedup_srcs() in opt_lop()")
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Reviewed-by: Lorenzo Rossi <git@rossilorenzo.dev>
(cherry picked from commit 041216e605)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00
Konstantin Seurer
3109237d7c llvmpipe: Always recompute 1/w
The value depends on the tgsi_interpolate_loc which is not constant for
the loop. llvm should be able to cse in cases where they are the same.

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit aa28fcb610)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00
Konstantin Seurer
775652e08b gallivm/nir/soa: Use the sign of src1 for imod
This is the behavior specified by the nir opcode, the spirv spec and
required by maintenance8.

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 4d30da6599)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00
Konstantin Seurer
51285c6715 lavapipe: Bump MAX_DESCRIPTOR_UNIFORM_BLOCK_SIZE
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 25e678a37d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38268>
2025-11-04 10:16:42 -08:00