Commit graph

105101 commits

Author SHA1 Message Date
Boyuan Zhang
d76c277421 st/va: use provided sizes and coords for vlVaGetImage
vlVaGetImage should respect the width, height, and coordinates x and y that
passed in. Therefore, pipe_box should be created with the passed in values
instead of surface width/height.

v2: add input size check, return error when size out of bounds
v3: fix the size check for vaimage
v4: add size adjustment for x and y coordinates

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Christian König <christian.koenig@amd.com>
2018-10-11 09:00:18 -04:00
Samuel Pitoiset
229803b66a radv: implement clear operations for R32G32B32
This fixes crashes for some CTS:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.*.linear_*_*
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.*.*_linear_*

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108113
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-10-11 14:49:16 +02:00
Samuel Pitoiset
c3ba3c2611 radv: disallow 3D images and mipmaps/layers for R32G32B32 linear formats
R32G32B32 are weird formats and we are only going to support
some basic operations for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-10-11 14:49:14 +02:00
Samuel Pitoiset
d179312b53 radv: add a workaround for a VGT hang with prim restart and strips
Otherwise, Yakuza and The Evil Within hang the GPU with DXVK.
This apparently only works on Polaris.

Suggested by Marek.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-10-11 10:16:11 +02:00
Timothy Arceri
3bc012a34e glsl: remove redundant es_shader checks
The es check is already covered by the is_version() check.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-10-11 14:45:43 +11:00
Dave Airlie
cc2fe57922 st/glsl_to_tgsi: initialise need_uarl in contructor
Found by coverity

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-11 10:20:37 +10:00
Dave Airlie
c5c3da6c90 glspirv: drop pointless assert (size_t is unsigned)
Found by coverity

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2018-10-11 10:19:48 +10:00
Dave Airlie
600d8ecb57 radv: remove unsigned comparison against 0
The value is always >= 0 here.

Found by coverity

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-10-11 10:19:20 +10:00
Dave Airlie
6e1d294804 radv: remove dead code for master_fd close
We have never opened master_Fd at this point, so remove code to
close it.

Found by coverity.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-10-11 10:19:16 +10:00
Dave Airlie
7c04b96f03 radv: don't pass shader key by copy
Coverity pointed out we were copying 168 bytes here unnecessarily.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-10-11 10:18:43 +10:00
Dave Airlie
29a7631986 anv: add missing unlock in error path.
Not going to matter, but be consistent.

Found by coverity

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: caf41c78c (anv/allocator: Support softpin in the BO cache)
2018-10-11 09:50:27 +10:00
Jason Ekstrand
4ba445e011 intel: Don't propagate conditional modifiers if a UD source is negated
This fixes a bug uncovered by my NIR integer division by constant
optimization series.

Fixes: 19f9cb72c8 "i965/fs: Add pass to propagate conditional..."
Fixes: 627f94b72e "i965/vec4: adding vec4_cmod_propagation..."
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-10-10 13:13:12 -05:00
Jason Ekstrand
328d4d080b util: Add tests for fast integer division by constants
While I generally trust rediculousfish to have done his homework, we've
made some adjustments to suit the needs of mesa and it'd be good to
test those.  Also, there's no better place than unit tests to clearly
document the different edge cases of the different methods.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-10 13:13:12 -05:00
Marek Olšák
a9be8dddfe util: Add power-of-two divisor support to compute_fast_udiv_info
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-10 13:13:12 -05:00
Jason Ekstrand
7cde4dbcd7 util: Generalize fast integer division to be variable bit-width
There's nothing inherently fixed-width in the code.  All that's required
to generalize it is to make everything internally 64-bit and pass
UINT_BITS in as a parameter to util_compute_fast_[us]div_info.  With
that, it can now handle 8, 16, 32, and 64-bit integer division by a
constant.

We also add support for division by 1 and by other powers of 2.  This is
useful if you want to divide by a uniform value in a shader where you
have the opportunity to adjust the uniform on the CPU before passing it
in.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-10 13:13:12 -05:00
Marek Olšák
64eb0738d4 util: Add fast division helpers
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-10-10 13:13:12 -05:00
Marek Olšák
2940c257a6 util: import public domain code for integer division by a constant
Compilers can use this to generate optimal code for integer division
by a constant.

Additionally, an unsigned division by a uniform that is constant but not
known at compile time can still be optimized by passing 2-4 division
factors to the shader as uniforms and executing one of the fast_udiv*
variants. The signed division algorithm doesn't have this capability.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-10 13:13:12 -05:00
Jason Ekstrand
0dca6730b4 util: Add a simple big math library
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-10-10 13:13:12 -05:00
Dylan Baker
b8521704ed meson: Don't allow building EGL on Windows or MacOS
Currently mesa only supports EGL on Unix like systems, cygwin, and
haiku. Meson should actually enforce this. This fixes the default build
on MacOS.

v2: - invert the condition, mark darwin and windows as not supported
      instead of trying to mark what is supported.
v3: - add missing )
v3: - Update comment to reflect condition change in v2

CC: 18.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-10 11:02:36 -07:00
Timothy Arceri
0346ad3774 glsl: ignore trailing whitespace when define redefined
The Nvidia/AMD binary drivers allow this, as does GCC.

This fixes shader compilation issues in the latest update of
No Mans Sky.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2018-10-10 15:08:32 +11:00
Ian Romanick
b44c9292b7 intel/compiler: Don't handle fsign.sat
No shader-db or CI changes on any Intel platform.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2018-10-09 13:56:42 -07:00
Ian Romanick
a68dd47b91 nir/algebraic: Simplify fsat of fsign
These allows us to not support fsign.sat in the Intel compiler backend,
and that will simplify some later changes.

No shader-db changes on any Intel platform.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2018-10-09 13:56:42 -07:00
Ian Romanick
1546204cdd nir/algebraic: sign(x)*x*x is abs(x)*x
shader-db results:

All Gen7+ platforms had similar results. (Skylake shown)
total instructions in shared programs: 15106023 -> 15105981 (<.01%)
instructions in affected programs: 300 -> 258 (-14.00%)
helped: 6
HURT: 0
helped stats (abs) min: 7 max: 7 x̄: 7.00 x̃: 7
helped stats (rel) min: 14.00% max: 14.00% x̄: 14.00% x̃: 14.00%
95% mean confidence interval for instructions value: -7.00 -7.00
95% mean confidence interval for instructions %-change: -14.00% -14.00%
Instructions are helped.

total cycles in shared programs: 566050327 -> 566050075 (<.01%)
cycles in affected programs: 2826 -> 2574 (-8.92%)
helped: 6
HURT: 0
helped stats (abs) min: 40 max: 44 x̄: 42.00 x̃: 42
helped stats (rel) min: 8.89% max: 8.94% x̄: 8.92% x̃: 8.92%
95% mean confidence interval for cycles value: -44.30 -39.70
95% mean confidence interval for cycles %-change: -8.95% -8.88%
Cycles are helped.

No changes on Gen6 or earlier.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2018-10-09 13:56:42 -07:00
Ian Romanick
10f4a8871e nir: Add helper functions to get the instruction that generated a nir_src
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2018-10-09 13:56:42 -07:00
Brian Paul
797e34f658 svga: change svga_destroy_shader_variant() to return void
svga_destroy_shader_variant() itself flushes and retries the command
if there's a failure.  So no need for the callers to do it.  Other
callers of the function were already ignoring the return value.

This also fixes a corner-case double-free reported by Coverity
(and reported by Dave Airlie).

Tested with various OpenGL apps.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2018-10-09 11:17:14 -06:00
Dylan Baker
b781688636 meson: Don't build glsl compiler tests unless OpenGL is enabled
Since there are no other users of the glsl compiler.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-09 08:56:00 -07:00
Dylan Baker
d84f003b95 meson: Only build gallium state tracker tests with shared_glapi
This has always been a requirement, it's just somehow been missed in the
meson build.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-09 08:55:56 -07:00
Dylan Baker
0fa6a8271a meson: only build clapi tests when OpenGL is being built
Otherwise building just vulkan (among other things) will build these
tests, pull in a bunch of stuff they shouldn't, and potentially fail to
compile.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-09 08:55:48 -07:00
Ilia Mirkin
92f56fbd89 nvc0: fix blitting red to srgb8_alpha
For some reason the 2d engine can't handle this. Red formats get special
treatment there, so perhaps related.

Fixes dEQP-GLES3 tests of the form:

  dEQP-GLES3.functional.fbo.blit.conversion.r{8,16f,32f}_to_srgb8_alpha8

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
2018-10-09 10:33:11 -04:00
Ilia Mirkin
9bf0614116 nv50,nvc0: guard against zero-size blits
The current state tracker can generate these sometimes. Fixing this is
more involved, and due to some integer math we can generate
divisions-by-zero.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
2018-10-09 10:33:11 -04:00
Ilia Mirkin
78d3640e49 nv50,nvc0: mark RGBX_UINT formats as renderable
This helps st/mesa avoid some (apparently) buggy fallbacks. Specifically
the CopyTexSubImage fallback tries to read texture A as RGBA_FLOAT and
write back that data into the target format, which fails for integer
formats which have no appropriate logic to do the conversion.

Since integer formats don't blend, there's no harm in the fact that the
"A" component gets written anyways.

Fixes, among others:
  https://www.khronos.org/registry/webgl/sdk/tests/conformance2/textures/canvas/tex-2d-rgb8ui-rgb_integer-unsigned_byte.html

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2018-10-09 10:33:11 -04:00
Eric Engestrom
976188737d radv: add missing meson c++ visibility arguments
Fixes: 6f3aee40f9 "radv: using tls to store llvm related info
                             and speed up compiles (v10)"
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-10-09 14:22:24 +01:00
Michel Dänzer
9d3fefdc41 gbm: Add GBM_FORMAT_ARGB1555 support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-09 10:32:51 +02:00
Michel Dänzer
e7e033ed8a st/dri: Handle BGRA5551 format
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-09 10:32:50 +02:00
Rob Clark
fa52ff856d freedreno/a5xx+a6xx: fix LRZ pitch alignment
Both RB_2D_DST_SIZE.PITCH (a6xx) and RB_MRT[n].PITCH (a5xx) need
alignment to 64.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-08 19:05:14 -04:00
Rob Clark
82c3b6fe49 freedreno/a6xx: add LRZ support
As with a5xx, hidden behind FD_MESA_DEBUG=lrz due to being paranoid
about z-fighting issues with some games (in particular, this was
observed with 0ad on a5xx.. but I think the proper solution to enable
this by default is to figure out how to do driver specific driconf
options).

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-08 19:05:14 -04:00
Rob Clark
a877451a41 freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-08 18:03:35 -04:00
Rob Clark
bf79a7cc25 freedreno/a6xx: add helper for various CP_EVENT_WRITE
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-08 17:50:26 -04:00
Rob Clark
60af89815e freedreno/a6xx: remove unused fxns
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-08 17:50:26 -04:00
Rob Clark
d5bd3ce89c freedreno/a6xx: remove fd6_shader_stateobj
Earlier gen's already got this cleanup, but a6xx was still off on a
branch then.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-08 17:50:26 -04:00
Ilia Mirkin
1bb1c03d61 glsl: fix array assignments of a swizzled vector
This happens in situations where we might do

  vec.wzyx[i] = ...

The swizzle would get effectively ignored because of the interaction
between how ir_assignment->set_lhs works and overwriting the write_mask.
There are two cases, one where i is a constant, and another where i is
variable. We have to be extra-careful in both cases.

Fixes the following WebGL test:

  https://www.khronos.org/registry/webgl/sdk/tests/conformance2/glsl3/vector-dynamic-indexing-swizzled-lvalue.html

And the new piglit tests:

  swizzled-writemask-indexing-nonconst.shader_test
  swizzled-writemask-indexing.shader_test

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2018-10-08 14:29:14 -04:00
Samuel Pitoiset
d3682766f6 radv: tidy up radv_pipeline_init_multisample_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-10-08 14:17:43 +02:00
Samuel Pitoiset
b38228ccb0 radv: always set PA_SC_MODE_CNTL_1.OUT_OF_ORDER_WATER_MARK
It has probably no effect without out of order rasterization
anyway.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-10-08 14:17:40 +02:00
Samuel Pitoiset
937986ca1d radv: set DB_EQAA.INCOHERENT_EQAA_READS
My attempt was to set this field instead of duplicating one.

Fixes: 6cfa321c39 ("radv: add potential missing fields for DB_EQAA")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-10-08 14:17:33 +02:00
Chystiakov, Dmytro
47e3338b04 i965: fallback RGBX to RGBA in glEGLImageTargetRenderbufferStorageOES
In the same fashion as is done for glEGLImageTextureTarget2D.

v2: share the fallback which sets baseformat and internalformat correctly
    which makes both of the tests pass (Tapani)

Fixes android.hardware.nativehardware.cts.AHardwareBufferNativeTests:

   #SingleLayer_ColorTest_GpuColorOutputCpuRead_R8G8B8X8_UNORM
   #SingleLayer_ColorTest_GpuColorOutputIsRenderable_R8G8B8X8_UNORM

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2018-10-08 08:03:45 +03:00
Tapani Pälli
d1fa69ed61 glsl: do not attempt assignment if operand type not parsed correctly
v2: check types of both operands (Ian)

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108012
2018-10-08 08:02:50 +03:00
Marek Olšák
d877451b48 util/u_queue: add UTIL_QUEUE_INIT_SET_FULL_THREAD_AFFINITY
Initial version discussed with Rob Clark under a different patch name.
This approach leaves his driver unaffected.
2018-10-06 22:05:58 -04:00
Marek Olšák
066aa44fc5 radeonsi: fix a typo at CS_PARTIAL_FLUSH
harmless
2018-10-06 21:50:52 -04:00
Marek Olšák
77903c8cfb ac: add ac_build_round 2018-10-06 21:50:09 -04:00
Marek Olšák
fa023f293e ac: correct PKT3_COPY_DATA definitions 2018-10-06 21:50:09 -04:00