Commit graph

3511 commits

Author SHA1 Message Date
Lionel Landwerlin
d2ff2b9e4a anv: fix multiple wait/signal on same binary semaphore
We need to guarantee that when vkQueueSubmit() returns the application
can actually wait on a signaled semaphore/syncobj.

When using a thread to do the submission to i915, this gets a bit
tricky in the following case :

   A syncobj is used both as a wait & signal semaphore and has been
   signaled once already. It contains a fence before entering
   vkQueueSubmit().

   This means we need to reset the syncobj to ensure when we return
   from vkQueueSubmit(), the syncobj contains no stale fence.

   Currently in the Anv, the submission thread is in charge of putting
   the new fence in the syncobj and also picks up the wait fence
   directly from the syncobj. This means we can't reset the syncobj
   from vkQueueSubmit().

The solution to this has been pointed by Bas & Jason :

   In vkQueueSubmit(), clone the wait syncobj fence into a new
   temporary syncobj that will be destroy after submission and use
   this temporary syncobj as a wait fence for i915. This allows us to
   reset the original syncobj in vkQueueSubmit().

   For this to work with wait_before_signal behavior, we also need to
   do a wait-on-materialize on binary semaphores from vkQueueSubmit().
   Otherwise the application thread calling vkQueueSubmit() could race
   the submission thread and pick up the wrong fence when cloing.

v2: Use copy semantic for clone_syncobj_dma_fence() (Jason)
    Do the cloning prior to adding the syncobj to anv_queue_submit so
    that if the cloning fails don't have an invalid syncobj in
    anv_queue_submit (Jason)

v3: Fix another syncobj leak (Jason)

v4: Fix invalid argument order (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4945
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11474>
2021-11-11 20:59:32 +00:00
Danylo Piliaiev
deb23612f7 vulkan/util: Handle depth-only formats in vk_att_ref_stencil_layout
From VUID-VkAttachmentReference2-attachment-04755:
 "If attachment is not VK_ATTACHMENT_UNUSED, and the format of the
  referenced attachment is a depth/stencil format which includes both
  depth and stencil aspects, and layout is
  VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL or
  VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL, the pNext chain must include
  a VkAttachmentReferenceStencilLayout structure."

We did not check that there even could be a stencil layout
before fetching it.

Fixes a few tests from:
 dEQP-VK.image.depth_stencil_descriptor.depth_read_only_optimal.*

Fixes: 979ea394e5 "vulkan/util: Move
helper functions for depth/stencil images to vk_iamge"

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13740>
2021-11-11 17:17:16 +00:00
Lionel Landwerlin
46c37c8600 anv: don't forget to add scratch buffer to BO list
We reference the scratch BO using a bindless index in the command
streamer instructions, but we forgot to add them to the BO list.

v2: Make use of pipeline reloc list (Jason)

v3: Don't add NULL BOs to the reloc list (Lionel)

v4: Don't add BOs twice to reloc list when dealing with addresses
    (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: eeeea5cb87 ("anv: Add support for scratch on XeHP")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13544>
2021-11-10 17:22:15 +00:00
Jason Ekstrand
e614789588 anv: Also disallow CCS_E for multi-LOD images
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4616
Fixes: e3101c96bb ("anv/image: Disable multi-layer CCS_E on TGL+")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13680>
2021-11-09 23:05:53 +00:00
Hyunjun Ko
979ea394e5 vulkan/util: Move helper functions for depth/stencil images to vk_iamge
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12785>
2021-11-09 16:12:04 +00:00
Hyunjun Ko
00bea38242 anv: Fix to honor the spec to get stencil layout.
Fixes: 28207669d0 ("anv: Fix stencil layout in render passes")

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12785>
2021-11-09 16:12:04 +00:00
Jason Ekstrand
8817377ce2 anv: Add an anv_bo_is_pinned helper
If we ever want to stop depending on the EXEC_OBJECT_PINNED to detect
when something is pinned (like for VM_BIND), having a helper will reduce
the code churn.  This also gives us the opportunity to make it compile
away to true/false when we can figure it out just based on compile-time
GFX_VERx10.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
2a75855049 anv: Stop checking for HAS_EXEC_FENCE
Starting with 3b363d5b55 ("anv: Assume syncobj support"), we assume
syncobj support and no longer use the execbuf sync_file API directly so
there's no point in checking for it.  For the one physical device check
this deletes, we can assume has_exec_fence is always true because every
kernel with syncobj support also has sync_file.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
2eb9057de0 anv: Add a use_relocations physical device bit
This is more the bit of information we want to be carrying around
long-term.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
cbcb10320f anv: Add a anv_use_relocations helper and use it
Soft-pin is but one possible mechanism for pinning buffers.  We're
working on another called VM_BIND.  Most of the time, the real question
we're asking isn't "are we using soft-pin?" but rather "are we using
relocations?" because it's relocations, and not soft-pin, that cause us
all the extra pain we have to write code to handle.  This commit flips
the majority of those checks around.  The new helper is currently just
the exact inverse of the old use_softpin helper.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
c15a8a43d9 anv: Int64 atomics don't need to depend on softpin
Ever since 04ccfeae98 ("anv: Require softpin on Gen8+"), softpin has
been a hard requirement on BDW+ so there's no reason for SKL+ code to
have a relocation path.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
1936ceec58 anv: Always set bindless surface base on SKL+
Ever since 04ccfeae98 ("anv: Require softpin on Gen8+"), softpin has
been a hard requirement on BDW+ so there's no reason for SKL+ code to
have a relocation path.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
13fe43714c anv: Add helpers in anv_allocator for mapping BOs
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
90ac06e502 anv: Fix FlushMappedMemoryRanges for odd mmap offsets
When the client calls vkMapMemory(), we have to align the requested
offset down to the nearest page or else the map will fail.  On platforms
where we have DRM_IOCTL_I915_GEM_MMAP_OFFSET, we always map the whole
buffer.  In either case, the original map may start before the requested
offset and we need to take that into account when we clflush.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
f9b69e43a5 anv: Add a couple more checks in MapMemory
Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
0967584549 anv: Add get/set_tiling helpers
These are only required WSI cases and Android but still better to have
them in a central place.

Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
135cac5c9c anv: Rename anv_bo::index to exec_obj_index
This is more descriptive of its very specific purpose.

Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
1394e415b7 anv/allocator: Use anv_device_release_bo in anv_block_pool_finish
This is left-over from the days where we didn't use BO pointers and had
them embedded and we didn't have a nice allocation API.  Now that block
pools get their memory via anv_device_alloc_bo(), they really should be
using anv_device_release_bo() to tear it down.  This is equivalent in
this case because anv_device_release_bo() does the following:

 1. Decrements refcount.  The pool holds the only reference so it will
    proceed onto the clean-up steps

 2. Unmaps it, if needed.  This is the same as the tear-down code today
    except anv_device_release_bo() will avoid doing an unmap if it's
    been created via userptr.  The current code probably unmaps the
    userptr which is wrong but pretty harmless since it happens on a
    tear-down path.

 3. Unmaps the CCS range from the AUX-TT, if any.  There is none, so
    this is a no-op.

 4. Frees the VA range if it's not pinned and doesn't have a fixed VA
    assignment.  These BOs always either have a fixed VA range (softpin)
    or aren't pinned (relocations).

 5. Closes the GEM handle.  Same as the current code.

In short, anything created using the BO API should probably be destroyed
that way.  We were getting away with hand-rolling it because this is a
simple case.  Why did we do it this way?  It dates back to before the
more formlized BO cache and BO API in ANV.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
0b2b9b49af anv: Pull aperture size from devinfo
Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jason Ekstrand
2254146d0a anv/allocator: Add a couple of helpers
The anv_bo_finish helper is explicitly supposed to be capable of tearing
down partially completed BOs as long as the flag and metadata parameters
are set correctly.

Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>
2021-11-09 02:48:24 +00:00
Jordan Justen
7eb13fc2f2 anv,blorp,iris: Set MOCS for COMPUTE_WALKER post-sync operation
We don't current enable post sync operations, but it is probably
better to set them to "internal" MOCS than to remove the non-zero
checking for this genxml field.

Reworks:
 * Fix COMPUTE_WALKER in cmd_buffer_trace_rays (s-b Jason)

Fixes: 7b78b2fcac ("intel/genxml: Assert that all MOCS fields are non-zero on Gfx7+")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13624>
2021-11-08 23:29:51 +00:00
Jason Ekstrand
419b02c90c anv,iris: Advertise a max 3D workgroup size of 1024^3
On GFX version 12.5+ with COMPUTE_WALKER, this is the limit based on the
size of the HW packet.  On older HW, we can technically go a bit bigger
but there's not much point.  Technically, some hardware can support a
scalar workgroup size up to 2048 but most apps don't go any bigger than
1024.

As discussed on the merge request page, the current limit assumes
SIMD32, but it is unclear if we want to encourage applications to use
SIMD32 if it may lead to additional register spilling in shader
programs. Many applications have likely tuned for a limit of 1024
based on the OpenGL minimum limit, so it might not gain much by
advertising more than 1024.

Reworks:
 * Jordan: Use MIN2 and limit total invocations as well.
 * Jordan: Add second paragraph to commit message based on merge
   request discussion.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13538>
2021-11-08 23:07:42 +00:00
Lionel Landwerlin
361b3fee3c intel: move away from booleans to identify platforms
v2: Drop changes around GFX_VERx10 == 75 (Luis)

v3: Replace
   (GFX_VERx10 < 75 && devinfo->platform != INTEL_PLATFORM_BYT)
   by
   (devinfo->platform == INTEL_PLATFORM_IVB)
   Replace
   (devinfo->ver >= 5 || devinfo->platform == INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 >= 45)
   Replace
   (devinfo->platform != INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 != 45)

v4: Fix crocus typo

v5: Rebase

v6: Add GFX3, ILK & I965 platforms (Jordan)
    Move ifdef to code expressions (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>
2021-11-08 16:48:06 +00:00
Caio Oliveira
8fc6a11f0e intel/blorp: Add option to emit packets that disable Mesh
If a driver doesn't support Mesh, don't emit anything.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13660>
2021-11-04 14:41:06 -07:00
Jason Ekstrand
953a4ca6fe intel: Add has_bit6_swizzle to devinfo
There's no good reason to have this rather complex check in three
drivers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13636>
2021-11-04 18:51:04 +00:00
Tapani Pälli
9f6764953b anv: setup syncobj fd via wsi_device_setup_syncobj_fd
Patch moves initialization of variable so that we have fd when calling
wsi initialization.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12305>
2021-11-04 16:57:29 +00:00
Mike Blumenkrantz
841bea2c9f anv: disable debug logging spam
nobody wants to see this by default, so disable it until #5404
is resolved to make it more manageable

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13628>
2021-11-04 02:24:43 +00:00
Vadym Shovkoplias
732cfa525f anv: Include viewport size in scissor rectangle
Prevent drawing outside the viewport when viewport size
is smaller than framebuffer size.

v2: (Jason Ekstrand)
- re-emit scissor on viewport change
- do the same calculations for other platforms

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5515
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13594>
2021-11-03 17:48:10 +00:00
Caio Marcelo de Oliveira Filho
71022a53e4 anv: Process FS last when compiling graphics pipeline
Enum values for MESA_SHADER_TASK and MESA_SHADER_MESH are larger than
MESA_SHADER_FRAGMENT, so can't rely on the them for ordering anymore.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13637>
2021-11-03 17:28:25 +00:00
Caio Marcelo de Oliveira Filho
a0109a3754 anv: Make shaders array in anv_graphics_pipeline fit Task/Mesh
We could decouple the locations in the array from the gl_shader_stage
enum values, but for now this is convenient.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13637>
2021-11-03 17:28:25 +00:00
Caio Marcelo de Oliveira Filho
eb430aa9e7 anv: Get rid of "may be used initialized" warning in anv_QueueSubmit2KHR
The code is correct, but compiler can't see it.  Initialize the value
to NULL and assert on it if the function succeeds.  It both helps the
compiler and make the code slightly more robust.

```
../src/intel/vulkan/anv_queue.c: In function ‘anv_QueueSubmit2KHR’:
../src/intel/vulkan/anv_queue.c:932:16: warning: ‘impl’ may be used uninitialized in this function [-Wmaybe-uninitialized]
  932 |       result = anv_queue_submit_add_timeline_wait(queue, submit,
      |                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  933 |                                                   &impl->timeline,
      |                                                   ~~~~~~~~~~~~~~~~
  934 |                                                   value);
      |                                                   ~~~~~~
../src/intel/vulkan/anv_queue.c:899:31: note: ‘impl’ was declared here
  899 |    struct anv_semaphore_impl *impl;
      |                               ^~~~
```

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13638>
2021-11-03 17:14:36 +00:00
Jason Ekstrand
4108fda426 vulkan: Move all the common object code to runtime/
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13156>
2021-10-29 23:12:32 +00:00
Kenneth Graunke
dfe455b6df anv: Set MOCS on NULL stream output buffers
We'd like to add safeguards against accidental use of MOCS 0 (uncached),
which can have large performance implications.  One case where we use
MOCS of 0 is disabled stream output targets,  MOCS shouldn't matter, as
there's no actual buffer to be cached.

That said, it should be harmless to set MOCS for these null stream
output buffers; we can just assume a MOCS for generic internal buffers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke
818b5d2b9e anv: Set MOCS on NULL vertex buffers
We'd like to add safeguards against accidental use of MOCS 0 (uncached),
which can have large performance implications.  One case where we use
MOCS of 0 is 3DSTATE_VERTEX_BUFFERS where we set NullVertexBuffer.
It shouldn't matter here, as there's no actual buffer to be cached.

That said, it should be harmless to set MOCS for null vertex buffers.
We can assume an internal buffer and request isl's vertex buffer MOCS.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke
7ae9f516f0 anv: Set MOCS in 3DSTATE_CONSTANT_XS even if there isn't a buffer.
This avoids MOCS != 0 assertions in later patches.  iris also does this,
and we do it for the 3DSTATE_CONSTANT_ALL packet path as well.  It's a
bit pointless, but it should hopefully be harmless also.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke
158ad07b3e anv: Set MOCS for 3DSTATE_CONSTANT_XS on Gfx7.x as well
We were only setting this on Gfx9+.  It's MBZ on Gfx8, but it exists
on Gfx7.x and doesn't have those restrictions there; we should set it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Kenneth Graunke
b4310ef8ee anv: Set default MOCS for NULL depth/stencil/HiZ buffers
isl now uses info->mocs regardless of whether there's any actual
depth/stencil/HiZ buffers involved, so pass it a legitimate one,
rather than zero.  When we have entirely NULL surfaces, we just
default to isl's MOCS value for an internal depth buffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:55 +00:00
Sagar Ghuge
565d65baaf anv: Enable CCS for storage image formats
v2: (Jason Ekstrand)
- Restructure if condition.
- Add early return.

v3: (Felix)
- Don't set aux_supported to false for storage image on XeHPG.

v4: (Nanley)
- Check image view format against fmt_list.
- Add helper anv_get_isl_format_with_usage.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3606>
2021-10-27 10:59:56 -07:00
Sagar Ghuge
64ea7e5e33 anv: Pass correct aux usage while filling out surface state
While filling out surface state, pass correct aux usage for storage
images as we support compression on XeHPG.

v2: (Jason Ekstrand)
- Move assertion down a bit
- Use general layout aux usage

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3606>
2021-10-27 10:59:56 -07:00
Sagar Ghuge
1ee043e662 anv: Drop hint if primitive id is required or not
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13474>
2021-10-26 18:22:14 +00:00
Lionel Landwerlin
a6031cd9bd anv: fix push constant lowering with bindless shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9fa1cdfe7f ("intel/rt: Implement push constants as global memory reads")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13529>
2021-10-26 15:41:43 +00:00
Kenneth Graunke
e79e1ca304 intel: Drop Tigerlake revision 0 workarounds
Tigerlake revision 0 is an early stepping that should not be used in
production anywhere, so this code was only used for hardware bringup.
We can drop the unnecessary workarounds.  This also keeps them from
triggering on early steppings of other Gfx12 parts.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13266>
2021-10-21 16:53:43 -07:00
Jason Ekstrand
39f2594531 anv: Implement VK_EXT_global_priority_query
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11250>
2021-10-20 15:51:59 +00:00
Vinson Lee
9eb010ee1e anv: Fix assertion.
Fix defect reported by Coverity Scan.

Assign instead of compare (PW.ASSIGN_WHERE_COMPARE_MEANT)
assign_where_compare_meant: use of "=" where "==" may have been intended

Fixes: 35315c68a5 ("anv: Use the common wrapper for GetPhysicalDeviceFormatProperties")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13395>
2021-10-18 09:04:47 +00:00
Marcin Ślusarz
d05f7b4a2c intel: fix INTEL_DEBUG environment variable on 32-bit systems
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13334>
2021-10-15 19:55:14 +00:00
Caio Marcelo de Oliveira Filho
26582db077 anv: Use nir_foreach_image_variable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4743>
2021-10-15 14:58:55 +00:00
Clayton Craft
b2ef7e6d6b anv: don't advertise vk conformance on GPUs that aren't conformant
This sets the conformance version to 0.0.0.0 for GPUs that have
incomplete support for vulkan, so that it's easier to check if vulkan is
fully supported by a GPU at runtime for applications/libraries.

    $ vulkaninfo|grep conf
    MESA-INTEL: warning: Ivy Bridge Vulkan support is incomplete
        conformanceVersion = 0.0.0.0

Signed-off-by: Clayton Craft <clayton@craftyguy.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13275>
2021-10-14 22:16:30 +00:00
Anuj Phogat
a98ece61e9 anv: Enable tessellation redistribution
This patch adds Tessellation Distribution on top of Geometry
Distribution. Using recommended values based on performance studies
across a range of workloads.

Rework:
- Add comment for new packet bits (Sagar)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
2021-10-13 22:36:54 +00:00
Anuj Phogat
867e2e0716 anv: Enable geometry distribution
Using recommended values based on performance studies across a range
of workloads.

Rework:
 * Always enable geometry distribution
 * Set ListCutIndexEnable if primitive restart is enabled
 * Set distribution mode based on TEEnable
 * Add comment explaining the 3DSTATE_VFG bits (Sagar)

v2:
- Emit 3DSTATE_VFG dynamically based on primitive restart (Ken)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
2021-10-13 22:36:54 +00:00
Lionel Landwerlin
47ff6767ea anv: fill correct surface state for lowered storage image
Small typo/copy-paste.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c0093c4668 ("anv: Flip around the way we reason about storage image lowering")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13332>
2021-10-13 14:33:14 +00:00