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anv,blorp,iris: Set MOCS for COMPUTE_WALKER post-sync operation

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We don't current enable post sync operations, but it is probably
better to set them to "internal" MOCS than to remove the non-zero
checking for this genxml field.

Reworks:
 * Fix COMPUTE_WALKER in cmd_buffer_trace_rays (s-b Jason)

Fixes: 7b78b2fcac ("intel/genxml: Assert that all MOCS fields are non-zero on Gfx7+")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13624>
This commit is contained in:
Jordan Justen 2021-10-31 23:22:42 -07:00 • committed by Marge Bot
parent a298ad26c1
commit 7eb13fc2f2
3 changed files with 4 additions and 0 deletions
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1
src/gallium/drivers/iris/iris_state.c
View file

@ -6982,6 +6982,7 @@ iris_upload_compute_walker(struct iris_context *ice,
cw.ThreadGroupIDYDimension = grid->grid[1];
cw.ThreadGroupIDZDimension = grid->grid[2];
cw.ExecutionMask = dispatch.right_mask;
cw.PostSync.MOCS = iris_mocs(NULL, &screen->isl_dev, 0);
cw.InterfaceDescriptor = (struct GENX(INTERFACE_DESCRIPTOR_DATA)) {
.KernelStartPointer = KSP(shader),

1
src/intel/blorp/blorp_genX_exec.h
View file

@ -2140,6 +2140,7 @@ blorp_exec_compute(struct blorp_batch *batch, const struct blorp_params *params)
cw.ThreadGroupIDYDimension = group_y1;
cw.ThreadGroupIDZDimension = group_z1;
cw.ExecutionMask = 0xffffffff;
cw.PostSync.MOCS = isl_mocs(batch->blorp->isl_dev, 0, false);
uint32_t surfaces_offset = blorp_setup_binding_table(batch, params);

2
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -4874,6 +4874,7 @@ emit_compute_walker(struct anv_cmd_buffer *cmd_buffer,
cw.ThreadGroupIDYDimension = groupCountY;
cw.ThreadGroupIDZDimension = groupCountZ;
cw.ExecutionMask = dispatch.right_mask;
cw.PostSync.MOCS = anv_mocs(pipeline->base.device, NULL, 0);
cw.InterfaceDescriptor = (struct GENX(INTERFACE_DESCRIPTOR_DATA)) {
.KernelStartPointer = cs_bin->kernel.offset,
@ -5291,6 +5292,7 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
cw.ThreadGroupIDZDimension = global_size[2];
cw.ExecutionMask = 0xff;
cw.EmitInlineParameter = true;
cw.PostSync.MOCS = anv_mocs(pipeline->base.device, NULL, 0);
const gl_shader_stage s = MESA_SHADER_RAYGEN;
struct anv_device *device = cmd_buffer->device;